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A 2 GOPS quad-mean shift processor with early termination for machine learning applications

by chtsai0305 on 31-Dec-2014
source: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6865089&queryText%3Dchang-hung+tsai
This paper proposes a 2 GOPS quad-mean shift processor (Q-MSP) architecture for data clustering and machine learning applications. By exploiting the linear approximation approach and early termination mechanism, the proposed algorithm can reduce 70% and 40% computational complexity, respectively. Moreover, 4 mean shift processor cores are integrated into the proposed architecture to support parallel processing to further improve system performance. Implemented in Xilinx Virtex-7 FPGA, this architecture occupies 65k LUTs and 3.3MB block memory to achieve 2 GOPS throughput operated at 125MHz.
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