Avalon AES ECB-Core (128, 192, 256 Bit)
192 Bit Configuration Bugs with Xilinx ISE #1
Open ruschi opened this issue almost 15 years ago
ruschi commented almost 15 years ago
When selecting roundkeys a division operation is done in keyexpansion.vhd This is no problem with 128 Bit or 256 bit keys because here it is i/4 or i/8 which is a shift-right operation, however with 192 bit its i/6 which cannot be achieved with simple shift operation. Quartus synthesizes w/o problems, ISE Webpack doesn't - maybe implementa a generic or a different roundconstant table that works w/o division....
ocadmin commented almost 15 years ago
ocadmin: just testing to add a comment
ruschi commented about 11 years ago
Sorry don't have Xilinx ISE, and nobody sofar complained about this bug anyway... won't fix
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