I'm trying to add support for the Actel internal JTAG TAP to the advanced debug system. I've already written the code. Trouble is, I don't have any Actel hardware.

I'm looking for someone willing to give my code a try on their Actel FPGA (ProASIC3 if possible). If you're familiar with the 'minsoc' project, and have implemented it on Actel hardware, then testing my changes should take very little time.

Drop me an email (nathan.yawn at gmail) or reply here with a contact address if you're interested. Thanks!