Hello, this is actually more of a question and based on the result, a possible project. But I am a beginner so bear with me.

Currently there are some suggested Opensource processor architectures here isn't it. So is it possible to design a program that can design a compiler/interpreter for a certain language by looking at the architecture. Since the core is pretty open, I don't see why this is impossible. Actually if this is indeed possible, my suggestion is that we design this for the OpenRisc. Okay maybe this is already there but I don't know.

And another question/suggestion. Looking at all these trends that are going on, I personally feel that we are learning too many programming languages, I mean one guy does web development with one thing and then hardware design with another, but nevertheless its just the same, bits of information. And also there are these new chips based on neural networks. It seems to me that it would be nice to have a programming language that can support different levels of abstraction, and different forms, I mean hardware and software. Let me give an example. Imagine if there is an FPGA, and (AFAIK it isn't possible to program and FPGA on runtime) let's say we can program it on runtime, and lets assume it has a certain processor running. Now let's say we write a C Program, to simply add two numbers, multiply and perform a certain set of operations. Rather than having this being done as a set of cycles, instead if we can synthesize the function in the programmable logic and then run it, it would be much faster and also less power consuming. And it would be much better if there is a programming language that works in this manner.

Maybe I might be sounding too ambitious, but I see this as a possibility. I heard in a lecture 2 years ago about the possibility of CGRA's but they are not in the mainstream yet. So to combine both worlds, it would be kind of nice if we made this programming language available already for the future.

Maybe I am going too wild... But just an idea. If it is possible by any chance by us, then I guess we can hit the mainstream and make the production go fast.

Have you looked through Agner's post discussing mixing FPGA's and CPU's together? It might contain some of what you are thinking of.

Further, reconfiguring FPGA's during runtime is ... possible. Xilinx has customers who are very interested in doing this. For these customers, they sell a special development package. That's all I know about it, however. I've got to imagine someone is actually doing it.

Dan

Hey Dan. Thank you for the info!

What do You mean by "looking at the architecture" ? Do you mean that a program takes rtl code of the processor core and spits out code for c compiler for example ?

I get the impression that You are very "Soft CPU Core" centric, remember that FPGA is far more than softcore processors. Generally speaking FPGA and CPU are very different approches to solve problems, that is why we have different languages for them. But hey, there are c compilers that can be synthesize to FPGA like SystemC. But in my opinion they exists only because some people are not so smart to lear VHDL or Verilog ...
The only use for synthesizing C code is when you use softcore in your system that can make use of a custom made co-processors. Then some part of C code can be synthesize to a co-processor. But I think this is already availiable (http://www.impulseaccelerated.com/products_universal.htm)

rozpruwacz,

Welcome to the discussion! You insight here is valuable, so thanks for piping up.

That said, ... I can't seem to follow the link you just provided. Is there a corrected link that would be more appropriate?

Dan

Here's a clickable link: http://www.impulseaccelerated.com/products_universal.htm

Dan

Hey rospruwacz,

"What do You mean by "looking at the architecture" ? Do you mean that a program takes rtl code of the processor core and spits out code for c compiler for example ?"

Yes this is exactly what I meant.

"I get the impression that You are very "Soft CPU Core" centric..."

True as you said. The reason I asked this question was because at that time I was searching on how to evaluate a processor architecture using an FPGA (just like in this research paper abstract link https://www.researchgate.net/publication/220760789_An_FPGA_Based_Hybrid_Processor_Emulation_Platform) , and at that time I was thinking that if it could be evaluated on an FPGA first, before manufacture, it would be easy... but then if one had to change the workings of the processor and the instruction set being changed regularly then there would be a need to "automatically" create a compiler based on the architecture, without a programmer having to port everything (sorry if I am very ignorant in my answers)

And since VHDL/Verilog is used for ASIC design then it would be good that such a system is available so that after evaluation of the architecture, the required compilers would be in place.

By the way to Dan and rospruwacz... thank you for your answers. I learned a lot :-)