3/105 
| Topic | Replies | Views | Last post |
| You need to be logged in to start a topic. Log in to the left or click here to register. |
|
||
| 12-bit numerically controlled oscillator | 9 | 392 |
"RE: 12-bit numerically controlled oscillator"
by zz_indigo Mar 26, 2012 |
| Running UVM example in System Verilog | 2 | 253 |
"RE: Running UVM example in System Verilog"
by vikramsinghh Mar 15, 2012 |
| CORDIC_Core | 2 | 282 |
"RE: CORDIC_Core"
by sharone_varghese Mar 13, 2012 |
| 256 point fft implementation | 0 | 213 |
"256 point fft implementation"
by ajaykumar2689 Mar 12, 2012 |
| Implementaion of log func in verilog | 2 | 233 |
"RE: Implementaion of log func in verilog"
by jeremybennett Mar 10, 2012 |
| fresh packages (gtkwave, Icarus Verilog, Verilator, SystemC, urjtag) for Ubuntu | 0 | 180 |
"fresh packages (gtkwave, Icarus Verilog, Verilator, SystemC, urjtag) for Ubuntu"
by iztok Mar 6, 2012 |
| SPI core by Simons... query | 2 | 298 |
"RE: SPI core by Simons... query"
by srinesh Feb 29, 2012 |
| Component Configuration | 0 | 161 |
"Component Configuration"
by ewmanmtc Feb 27, 2012 |
| Delayed assignment recommendation | 1 | 179 |
"RE: Delayed assignment recommendation"
by rdiez2 Feb 26, 2012 |
| can an input port be a reg? | 2 | 275 |
"RE: can an input port be a reg?"
by ka6s Feb 25, 2012 |
| Reset signal recommendation in the | 8 | 346 |
"RE: Reset signal recommendation in the "
by jt_eaton Feb 25, 2012 |
| AHB Wrapper | 0 | 167 |
"AHB Wrapper"
by rajashekar Feb 23, 2012 |
| Core for support vector machine in verilog | 0 | 143 |
"Core for support vector machine in verilog"
by hallolo Feb 23, 2012 |
| gain control for audio perpose | 0 | 115 |
"gain control for audio perpose"
by arash_rezaee Feb 21, 2012 |
| NGD file reading? | 0 | 116 |
"NGD file reading?"
by pramodml Feb 15, 2012 |
3/105