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Message
From: "Illan Glasner" <iglasner@z...>
Date: Wed, 16 Jan 2002 12:14:33 -0800
Subject: RE: [ethmac] BOUNCE ethmac@o...... (fwd)
Hi,
a small suggestion as if I understand correct you plan to use this
core at some time in Asic maybe you should build a test bench yourself
as not like FPGA the penelty for mistake is big and I would imagine that
the test bench that was done are not as exsustive as they should be for
Asic design (my appolegize in advance if I'm wrong).
saying this I would think it should be easier to make a tester for all
the design as a MAC is very deterministic behave meaning you send A and
expect to get B and if you send A1 and than A2 they will come out as B1
than B2 so you can simply make a generator that also print the expected
and similar have a reciver that print what it receive and than diff the
result, or if you prefare as this is not big design have a memorey where
you store the expect and verify on the fly with what you recive.
just my 2c
have a nice day
Illan
-----Original Message-----
From: Miha Lampret [mailto:mlampret@o...]
Sent: Friday, January 04, 2002 2:11 AM
To: ethmac@o...
Subject: [ethmac] BOUNCE ethmac@o...... (fwd)
---------- Forwarded message ----------
Date: Fri, 4 Jan 2002 09:08:27 +0100
From: owner-ethmac@o...
To: owner-ethmac@o...
Subject: BOUNCE ethmac@o...: Admin request:
/^subject:\s*help\b/i
From: "Veeresh" <veeresha_bs@i...>
To: "ethmac" <ethmac@o...>
Subject: Help needed by Igor
Date: Fri, 4 Jan 2002 13:22:48 +0530
Hi Igor,
While checking the functionality of individual modules of your Ethenet =
mac core,we r really facing difficulties.I hope you would have tested =
the functionality of each and every individual module before uploading =
onto the CVS.Can u pleae do me a favour giving the testbench files for =
all the individual modules of your core.Please do me this favour.
I will be waiting for your reply.
Thanks and Regards,
- Veeresh and Satya
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