OpenCores

Call for participants for SOC project based on OpenRISC and SystemC

Source:

Dear OpenCores community,

I want to start a new project based on OpenRISC and SystemC, the goal is to set up an SoC(NoC) simulation platform for virtual prototyping, system modeling, and early software development. It will have the following features:

1) All system components are written in SystemC, two types are supported: Cycle Accurate / Pin Accuate, Transaction level model (TLM 2.0);
2) Model interface and system interconnet may base on OCP (www.ocpip.org) or VCI or Wishbone, to be determined;
3) All Or1ksim components will be rewritten using SystemC;
4) A SystemC library will be constructed based on these models.

As the first step, the OpenRISC Processor based on SystemC will be implemented, and following will be other components in Or1ksim. It's better that different models can be started at the same time if we have enough members to do this.

By the way, I'm glad to see that an oc-h264-encoder project has been started on opencores, maybe a SystemC model for the encoder is needed both for reference data providing and early firmware development, thus the SystemC OpenRISC will be nessary for its verification.

If you are interested in this project, please contact me freely via jackoc@opencores.org with an indication of your talents and interests. Thanks.

Best Regards.

Jack.

By: Jack, Jack

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