Power Management of OpenRISC Using On-chip Voltage Regulators Cores
In this article, we suggest to build on-die switched-capacitor voltage regulators to significantly reduce the power consumption of the OpenRISC SoCs while maintaining performance. We hope to gain your feedback to better understand the SoCs voltage regulators' needs.
At Nile University, we are conducting research on SoCs power management. On the core of this research, we are building some on-die voltage regulator (VR) standard cells and we hope to provide them in OpenCores.
In our first project, we build a completely on-chip switched-capacitor VR without using off-chip components. This VR utilizes the mandatory on-chip power-grid decaps, and therefore doesn’t require extra area. The designed VR converts the 2 V input voltage down to 1.2 V - 0.45 V continuous output range (at 84% efficiency) and has ultra fast response to supply high-performance digital loads of sudden current spikes. This fine-grain VR is designed to enable multiple independent on-chip voltage supplies to support per-IP or block power management. The designed VR employs a standard template which is easy to tile in order to realize any load requirement, from few milli-Amps to multiple Amps. Therefore, this standard cell VR can provide point-of-load power delivery to different-size blocks in SoCs, enabling fast dynamic voltage/frequency scaling without facing power-grid impedance problems. The proposed VR employs an all-digital control loop; where a digital word, representing the required operating speed of the supplied digital load, is used as the input reference. Therefore, this VR offers a plug-and-play usability without the need to estimate and design the analog references, and also enhances the robustness of the supplied load against process and temperature variations.
Voltage scaling techniques (dynamic or static) are becoming effective to reduce the leakage power as well as the prevailing dynamic power. However with increased conversion ratios (Vout/Vin), low-dropout VRs (LDOs) fail to maintain high-efficiency. Thus, we hope the proposed switched-capacitor VR would replace LDOs and thus satisfy the needed low supply levels (e.g. sub-threshold) at high-efficiency.
We humbly ask the OpenCores community for feedback.
By: Loai, Salem