OpenCores

32 bit RISC Processor- BETA :: Overview

Project maintainers

Details

Name: beta_proccesor
Created: Jun 19, 2016
Updated: Jul 31, 2016
SVN: No files checked in

Other project properties

Category: Processor
Language: Verilog
Development status: Planning
Additional info: Specification done
WishBone Compliant: No
License: GPL

Description

RISC Processor 32 bit

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