Fleming, Kermin

Bluespec MD6 

## Features

\- Latency insensitive design  
\- Should be portable to most bus architectures/platforms  
\- Easily amenable to multi-clock domain extension  
\- Support for long burst transfers  
\- Configurable number of compression cores, compression core parallelism

## Status

This project is under on-going development as we seek to explore and to improve the architecture of the implementation.  
  
We have demonstrated this architecture on the Xilink XUP board, on which we have obtained throughputs in excess of 233 MB/s for MD6-512


<h2 id=""></h2>
<p></p>
<h2 id="features">Features</h2>
<p>- Latency insensitive design<br />
  - Should be portable to most bus architectures/platforms<br />
  - Easily amenable to multi-clock domain extension<br />
- Support for long burst transfers<br />
- Configurable number of compression cores, compression core parallelism</p>
<h2 id="status">Status</h2>
<p>This project is under on-going development as we seek to explore and to improve the architecture of the implementation.<br />
<br />
We have demonstrated this architecture on the Xilink XUP board, on which we have obtained throughputs in excess of 233 MB/s for MD6-512</p>


Browse

Bluespec MD6

Project maintainers

Details

Other project properties

Features

Status