Name: mafa-pc-board
Created: May 10, 2004
Updated: Jun 21, 2004
SVN: No files checked in
Category: Prototype board
Language:
Development status: Planning
Additional info:
none
WishBone Compliant: No
License: LGPL
Important, please read: This project is virtualy frozen because we don't have already available free tools like Xilinx WebPack with 1.000.000 (or more) gates FPGA support needed for some standard 32bit processor core with FPU and MMU like Leon (Sparc processor clone) or similar... We still hope that Xilinx should possible add support for XC3S1000 (next bigger chip than already supported XC3S400) in some new version of WebPack... or in software upgrade for 6.2i version... then we must wait some time. NOTE: Project is in planning phase, and is open for suggestions! If you have suggestion please send it to http://www.opencores.org/forums.cgi/cores/post (cores mailing list) >>>>At Neil Franklin's http://neil.franklin.ch/ (site), in the project http://neil.franklin.ch/Projects/index.html.en (pages), exist one great analysis about FPGA-PC principles and conception, please visit and read this http://neil.franklin.ch/Projects/FPGA-PC/ (page). This open hardware project will be intended to test and use "soft" processor cores (VHDL/Verilog implementation) in personal computing applications. This board will be an development board with wide area of practical computing appliance, including embedded and dedicated projects for "single task". This concept is similar to http://www.opencores.org/projects.cgi/web/fac2222m/overview (fac2222m). It will be standard small ATX sized board, and possibly with all de-facto "PC" standard I/O interfaces available today:two rs232, one LPT, two or more USBs, Floppy, IDE, SCSI, Serial ATA, VGA, keyboard, mouse, Fire Wire, etc. All I/Os will be divided in few logical groups, and will be allocated to target specific FPGA chips, for I/O bridge and (possibly) caching function. One other (large?) FPGA will be intended to be "processor" with possibility to implement any existing processor core (OR1000? PPC? ARM?). Memory block will be separatly builded, for easy implementation of any new and cheap memory solution. System memory will be designed to be 64bit wide, and address space vill be 96GByte or more. Memory bridge will be memory controller also (SDRAM, DDR, or any other), and will have caching function. I think also about onboard hardware implementation of http://www.opencores.org/projects.cgi/web/wishbone/wishbone (Wishbone) interface, with three slots, or more... This will be usable for easy testing any new and possibly non-PC standard I/O interfaces and cores (CAN, crypto cores, etc.)
- External I/O
- two serial RS232
- two serial RS485 (up to 30Mbps at short distances)
- two or more USBs
- old LPT port
- one VGA interface (with their own memory block... possibly soldered)
- one keyboard interface ("PS2")
- one mouse interface ("PS2")
- some cheap (but good) audio interface or audio codec chip only, with 7+1 output feature. We don't need http://www.opencores.org/projects.cgi/web/fac2222m/overview (fac2222m) for MP3s :)
- one ethernet interface 10/100(/1000?)
- one FireWire interface
- one optical S/PDIF I/O interface (Toslink)
- one external SCSI interface.
- Compact Flash interface (not hot-plug, CF ATA mode only)
- Internal I/O
- Floppy controller
- SCSI interface
- EIDE interface
- Seraial ATA interface
- PCI interface with three connectors
- http://www.opencores.org/projects.cgi/web/wishbone/wishbone (Wishbone) interface with three connectors (hardware implementation)
- "PC Speaker" interface.
- High speed A/D converter for RF tuner application, http://www.opencores.org/people.cgi/info/rudi (Rudolf Usselmann) suggestion for http://www.opencores.org/projects.cgi/web/fac2222m/overview (fac2222m). (mafa-pc-board will be better place for this feature than audio dsp card, IMHO, but, cheap and simple card with hardware Wishbone interface will be usable also)
- forgot something?
- Memory
- 64 bit wide.
- 96 GByte Address space (or more...)
- It will be smart step to define some other connector for memory card, DDR modules will be obsolete in future...
- Caching functions will be implemented in FPGA, with some fast SRAM support.
- Suggestions?