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MPEG2 Video decoder :: Overview

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Details

Name: mpeg2fpga
Created: Aug 25, 2017
Updated: Aug 29, 2017
SVN Updated: Aug 25, 2017
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Video controller
Language: Verilog
Development status: Stable
Additional info: FPGA proven
WishBone compliant: No
WishBone version: n/a
License: BSD

Description

This project is an MPEG2 video decoder. The decoder converts an MPEG2 stream into a RGB video output. To get a functioning decoder, you will need to add at least the following additional components:

  • MPEG2 video source
  • RGB video output
  • memory controller

The input of the decoder is a MPEG2 stream. This could be streaming video over ethernet, a tv or satellite tv tuner, or a file on flash memory.

The output of the decoder is a Red/Green/Blue (RGB) video signal. This can be connected to a VGA, DVI or HDMI video output.

The decoder also needs a memory controller and RAM as a scratchpad memory, to store decoded video images.

Lastly, if your project includes a small micro controller, you can use the On Screen Display (OSD).

What this decoder does not do:

  • The decoder does not decode audio. To decode audio you need to add an MP3 audio decoder core, and you need to synchronize video and audio.

Tested & Verified on Xilinx ML505 board.

Contains testbenches based on iVerilog and GTKWave.

For more in-depth information, see the User Manual.

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