| 22-Jul-2010 17:26:00 |
A fully tested port of Newlib 1.18.0 suitable for use with Or1ksim
is now available in SVN (checkout from http://www.opencores.org/ocsvn/openrisc/openrisc/trunk/gnu-src/newlib-1.18.0). See
the GNU
toolchain page for more details.
|
| 23-Jun-2010 12:30:00 |
Waqas Ahmed's Master's disseration and associated code is now
available on the download
page. This uses an innovative OSCI SystemC TLM 2.0 testbench to
facilitate comparative testing of Or1ksim and the OR1200v2 Verilog
RTL within an OVM framework.
|
| 22-Jun-2010 12:30:00 |
Or1ksim 0.4.0 stable release now available from the downloads
page. Full details on the Or1ksim page.
|
| 16-Jun-2010 15:30:00 |
Or1ksim 0.4.0 release candidate 2 now available from the downloads
page. This fixes a slew of detailed bugs found by Waqas Ahmed in
his Masters degree disseration, Implementation and Verification
of a CPU Subsystem for Multimode RF Transceivers at the Royal
Institute of Technology, Sweden. You are encouraged to give this a
trial and report any issues on the OpenRISC
forum. Objective is a stable release before the end of this
month.
|
| 02-Jun-2010 11:30:00 |
Or1ksim 0.4.0 release candidate 1 now available from the downloads
page. New features are single precision floating point support,
JTAG library interface and an automated regression test suite. You
are encouraged to give this a trial and report any issues on the OpenRISC
forum. Objective is a stable release before the end of this
month.
|
| 25-May-2009 10:07:12 |
Released the "new" OpenRISC project page. |
| 20-May-2009 22:10:38 |
Upgraded the ORPSoC (OpenRISC Reference Platform & verification system) so that it
works with the upgraded GNU toolchain. |
| 10-Mar-2009 08:09:47 |
Upgraded the GNU toolchain installation script. |
| 02-Mar-2009 14:41:23 |
Or1ksim 0.3.0 release is now available. This is the recommended, stable, version of Or1ksim.
Source code, user guide and internal documentation are all available on the download page. |
| 02-Mar-2009 11:03:05 |
GDB 6.8 for OpenRISC 1000, release 2.1 patch file is now available for download. This fixes some
type casting requirements so it will compile with GCC 4.1.3 under Ubuntu Linux. Thanks to Sigma HH for the patches |
| 24-Feb-2009 16:50:53 |
Or1ksim 0.3.0 release candidate 3 now available. Source code, user guide and internal documentation
all available on the download page. This release fixes all the critical outstanding bugs. It is
intended to move to full release 0.3.0 by the end of February 2009. |
| 21-Feb-2009 14:57:14 |
Icarus Verilog simulation models and Verilator cycle accurate SystemC models of ORPSoC now available in CVS |
| 16-Jan-2009 11:22:49 |
Xiang Li and Lin Zuo, master students of the SoC program of KTH, Sweden have developed a general purpose
embedded platform which uses the OpenRISC OR1200 processor as the CPU. For more information see the ORPSoC page. |
| 11-Nov-2008 16:58:40 |
GDB 6.8 issue 2 now available as a source code patch for the standard GDB 6.8 distribution here. This version
supports the GDB Remote Serial Protocol and complements the release of Or1ksim 0.3.0rc2. |
| 11-Nov-2008 15:01:19 |
Or1ksim 0.3.0 release candidate 2 now available for download here. This now supports the GDB Remote Serial Protocol.
You are encouraged to give this a trial and report any issues to the OpenRISC mailing list. Objective remains
a stable release before the end of the year. |
| 12-Oct-2008 20:50:26 |
Or1ksim 0.3.0 release candidate 1 now available for download here. You are encouraged to give this a trial
and report any issues to the OpenRISC mailing list. Objective is a stable release before the end of the year. |
| 31-Aug-2008 11:15:02 |
The source files and convenience patches for GDB 6.8 for the OpenRISC 1000 have been committed to CVS.
Feedback via the OpenRISC mailing list and bug reports via the tracker are encouraged. |
| 14-May-2008 08:01:29 |
We are currently working on updating the OR1200 and its toolchain. More information will be
presented shortly. |
| 03-Mar-2006 17:58:44 |
Vivace Semiconductor's roadmap, unveiled at a venture capital event in San Francisco, multimedia chips that
will run Linux 2.6 on a "Vivid Media" processor that integrates an OpenRISC 1200 core with a collection
of engines allowing multiple media functions to be executed on a single silicon die. |
| 13-Dec-2004 18:30:50 |
OpenRisc 1200 on a Celoxica RC203 board full source code imported to CVS |
| 29-Aug-2004 12:48:40 |
OpenRISC 1200 implementation in single-mask ViaMask Structured ASIC. A good alternative to FPGAs because
you get more MHz and a unit price is much lower. And a good alternative to standard cell implementations
because in the NRE you can save $1mio and turn around time is much shorter. More information. |
| 05-Apr-2004 10:52:41 |
OR1200 branch_qmem got merged into OR1200 main source tree. Developments done in last 9 months are available
as default (HEAD) revision and tagged as rel_27. |
| 26-Mar-2004 16:58:28 |
Between Apr 3rd and Apr 5th 2004 in San Jose, CA it is possible to see openrisc chip running Linux and a
web server. More information. |
| 18-Mar-2004 19:57:20 |
Tutorials on the OpenRISC implementation on Xilinx and Altera FPGA boards. Very useful for beginners,
a must read for everyone wanting to implement OpenRISC based system on a FPGA for the first time.
Also features tutorial how to build the OpenRISC GNU toolchain. Credits go to Resarch Group Digital
Techniques, Hogeschool voor Wetenschap & Kunst. |
| 02-Dec-2003 01:02:51 |
More information on the Flextronics Semiconductor OR1200 chip. Live demos available in California
between Dec 8th and Dec 15th. |
| 29-Aug-2003 21:26:35 |
Flextronics Semiconductor built a SoC with OR1200, Ethernet 10/100 MAC, PCI 32 33/66, UART16550 and
memory interface. Pictures of the chip from top and bottom side. More information will be available later. |
| 15-Jun-2003 00:00:07 |
How is California based company Rosum successfully using OR1200 in their positioning system SoC ASIC.
Success story. |
| 04-Jun-2003 16:09:12 |
Swedish magazine Elektroniktidningen published two articles about OpenCores and OpenRISC.
Article 1 and Article 2. |
| 15-Apr-2003 20:01:03 |
GNU toolchain and DDD are now also available for MS Windows/Cygwin environment. To download Cygwin package,
go to GNU Toolchain port page. |
| 20-Mar-2003 20:46:51 |
How Swedish company VOXI AB successfully used OR1200 in their speech recognition system.
Success story. |
| 16-Dec-2002 00:40:30 |
EE Times In Focus article about OR1200 based SoC and embedded Linux. |
| 09-Dec-2002 03:31:52 |
New web section has been added, ORPsoc, with some nice pictures. |
| 09-Dec-2002 03:31:21 |
OR1200 RTL now also (optionally, disabled by default) supports WISHBONE B3 specification. |
| 12-Nov-2002 14:40:29 |
If you have 5 minutes, gives us some feedback by completing the OpenRISC survey. |
| 30-Oct-2002 01:37:41 |
Support for BIST has been added via special BIST scan chain. Right now special BIST wrapper needs to be used,
at the moment this is only supported for Virtual Silicon RAMs. |
| 08-Sep-2002 19:09:59 |
Optional l.addc/l.addic and l.div/l.divu instructions have been added to OR1200 RTL. At the time of
writing this l.addc/l.addic are not generated by or32 C compiler, but l.div/l.divu are. However if you
want to use l.div/l.divu you need to install the latest or32 binutils because encoding of l.div/l.divu changed. |
| 02-Sep-2002 20:47:09 |
The OR1200 IP core has been chosen by Flextronics Semiconductor, proven in FPGA technology and integrated
into a Flextronics' design. Flextronics can offer commercial design services to companies that want to
use this IP in their products - for more information fill out this questionnaire. |
| 22-Aug-2002 19:17:39 |
OR1200 RTL now has a configurable store buffer that speeds store instructions. It has been tested in
orp_soc environment. Typical increase in performance is 20%. |
| 19-Aug-2002 19:45:06 |
uClinux is now compliant with ORP architecture. |
| 18-Aug-2002 18:57:13 |
Explanation of ORP has been added under ORPmon. |
| 16-Aug-2002 20:39:04 |
or1ksim/testbench is now completely functional (you can do 'make check' and it shouldn't fail).
Test cases in testbench are now ORP compliant. |
| 16-Aug-2002 03:50:06
| ATS has been greatly enhanced. Now there are two targets: or32-uclinux and or32-rtems. First with uClibc and
second with newlib. Also uClinux is now built and simulated. Additionally information about last working
toolchain/OS are provided (beside status of the current software in the CVS). ATS scripts are also provided. |
| 02-Aug-2002 17:13:50 |
Today we started news section. For start ATS is back online. In the future more items will be added to ATS. |
