OpenCores

RC4 Pseudo-random stream generator

News
Feb 26, 2013Updated description. 2 clocks/byte -> 1clock/byteAlfredo, Ortega
Jul 11, 2012Updated documentation of design and FPGA proven.Alfredo, Ortega
Jul 11, 2012Updated documentationAlfredo, Ortega
Jun 4, 2012Synthesizes OK with ISE, compliant with Wikipedia testvectors, I consider it Stable now.Alfredo, Ortega
May 21, 2012Updated licensing to LGPLAlfredo, Ortega
May 18, 2012First version - RC4 algorithm working but need modularizationAlfredo, Ortega