Name: simple_pic
Created: Dec 2, 2002
Updated: Mar 4, 2008
SVN Updated: No data
SVN: Browse
Latest version: download
Statistics: View
Category: Other
Language: Verilog
Development status: Stable
Additional info:
FPGA proven
WishBone Compliant: Yes
License:
Simple programmable interrupt controller. It supports up to 8 interrupt sources. Polarity and sensitivity (either edge or level) is programmable per interrupt source. The core features an 8bit wishbone interface. Wider wishbone interfaces are easily supported by using multiple instances.
Very simple, very small.