部分翻译
News
| Dec 12, 2001 |
The SXP was synthesized using the Mosis 1.2um library in Synopsys DC.
Results of the synthesis indicate that the processor can easily run at 10Mhz for a 1.2um technology.
The number of gates was estimated at 20K. (This includes the multiplier.)
Simulation of the netlist ran smoothly and matched the simulation results of the verilog simulation! |
| Oct 27, 2001 |
Project started |
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