USB FT232H Avalon-MM interface :: Overview

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Name: usb_ft232h_avalon-mm_interface
Created: May 31, 2016
Updated: Mar 2, 2017
SVN Updated: Mar 2, 2017
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Latest version: download
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Other project properties

Category: Communication controller
Language: Verilog
Development status: Stable
Additional info: Design done
WishBone Compliant: No
License: LGPL


This core implements the Altera Avalon-MM interface for FTDI FT232H device in FT245 Synchronous FIFO mode.
The core has internal FIFOs on the receive and transmit.
Tested with Scatter-Gather DMA and DMA Controller cores.
For more information about FT232H and FT245 Synchronous FIFO Mode visit
Included: Verilog core, NIOS2 header file, NIOS2 test application, PC test application.
* Update core.
* Now you can specify the size of the RX and TX buffers separately.
* Improved stability.
* Add c++ style header file.

Now core work with maximum data transfer rate up to 40 MB/s, that is maximum for
synchronous FIFO mode.
Later it will be updated test software.

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