Wishbone FLASH Interface for Parallel FLASH :: Overview
Project maintainers
Details
Name: wb_flash
Created: Jun 3, 2008
Updated: Jul 20, 2008
SVN Updated: Mar 10, 2009
SVN: Browse
Latest version: download
Statistics: View
Other project properties
Category: Memory core
Language: Verilog
Development status: Stable
Additional info:
Design done, FPGA proven
WishBone Compliant: Yes
License: LGPL
Description
Wishbone to Parallel FLASH interface with integral wait-state generator. This design has been used with the Intel StrataFlash Xilinx Spartan 3E Starter Kit. Provides an 8-bit data interface to the FLASH, and a 32-bit Wishbone Slave Interface with byte enables.
The StrataFlash on the S3E Starter Kit can be programmed using the PicoBlaze RS-232 StrataFlashâ„¢ Programmer downloadable from the following site:
http://www.xilinx.com/products/boards/s3estarter/reference_designs.htm