Yellow Star :: Downloads
This page contains files uploaded to the old opencores website as well as images and documents intended for use on other pages in this project. If you want to download this project or browse its svn, you can do so at the overview-page.
| Date | File | Description |
| processor.v | Verilog: hierarchical, autogenerated | |
| yellowstar_symbols.tar.gz | All Yellow Star EDIF symbols | |
| yellowstar_schematics.tar.gz | All Yellow Star EDIF schematics | |
| appendix.pdf | Appendix to the report | |
| report.pdf | Report on making the Yellow Star | |
| yellow_star.tar.gz | All powerview schematics |