Overview :: News :: CVS :: Tracker :: Discussions (cores)

GECKO3 SoC co-design environment: Overview Details Name: gecko3 Created: 23-Sep-2008 08:00:31 Updated: 04-Nov-2008 11:24:28 CVS: browse Other project properties Category :: Prototype board Category :: SoC Dependencies :: Other cores Language :: Other Language :: SystemC Language :: Verilog Language :: VHDL License :: LGPL Development status :: Production/Stable Project maintainers Christoph Zimmermann Statistics view Description Goal of this larger team project (staff research and master thesis) is to develop a new generation of the general purpose System-­on-chip hardware/software co­design development boards (GECKO). This is now the third generation of these boards, so the current project is called GECKO3. The main improvement of this generation is the small form factor of the size of a credit card (about half of GECKO2), more robust connectors and most important a lot more available resources for the developer (factor 10 to 50 more compared to GECKO2). All GECKO3 system components can be stacked together, as they all have a common backbone bus connector and all have the size of a credit card. Information about the whole Project, all related modules, software support, tutorials and much more can be found on the project wiki: labs.ti.bfh.ch/gecko GECKO3main The core of the GECKO3 Project is the GECKO3main board which can be used as a general purpose System-­on­-Chip platform for hardware/software co­designs. The GECKO3main contains a very large 1 to 4 million gate Xilinx FPGA for application specific designs. The GECKO3main board contains also large dynamic memory (128 MB) and flash memory banks (32 MB), USB 2.0 and 100 Mbit/s LAN interfaces. Features The features of the Gecko3main board include: FPGA with 1.5Mio. to 4Mio. gates (Xilinx Spartan3) 128 Mbyte DDR SDRAM and 32Mbyte NOR Flash (Enough to support Linux) USB 2.0 interface for configuration and data transfer 100 Mbit/s Ethernet interface Small, as size range of a credit card (85 x 54,5 mm) Fully Compatible with IP-Cores from: Opencores.org, LEON3 and Xilinx EDK Status Initial release is availabe trough CVS. More to come when the other subprojects are ready to be released. GECKO3main hardware: finished, USB Firmware: work in progress, Host library: work in progress GECKO3main_tester: finished GECKO3EDU (Including GECKO3power, GECKO3basic and GECKO3 robot) finished Currently we search for industry partners to produce and distribute GECKO3 modules for the public. We search also project partners in the academic environment to adopt our platform for there research projects. Feel free to contact us.