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I2S Interface: Overview Details Name: i2s_interface Created: 28-Jul-2004 14:46:32 Updated: 19-Sep-2008 12:39:31 CVS: browse, lint reports Other project properties Category :: Communication controller Language :: VHDL License :: GPL Phaze :: Design done Phaze :: FPGA proven Standard :: Wishbone compliant core Development status :: Production/Stable Project maintainers Geir Drange Statistics view Description I2S is an industry standard (invented by Philips) 3-wire interface for streaming stereo audio between devices. Typical applications include digital audio transfer between a CPU/DSP and a DAC/ADC. The I2S core allows a Wishbone master to stream stereo audio to and from I2S capable devices. Features Separate transmitter and receiver. Operates in either slave or master mode. Configurable sample buffer size. Supports 16bit to 32bit resolution. Supports 16bit and 32bit Wishbone data bus. Interrupt capability. Status Core is complete and released.