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JOP: a Java Optimized Processor: Overview Details Name: jop Created: 19-Feb-2004 09:51:21 Updated: 04-Jul-2008 21:53:13 CVS: browse Other project properties Category :: Microprocessor Language :: VHDL License :: GPL Phaze :: FPGA proven Standard :: Wishbone compliant core Development status :: Production/Stable Project maintainers Paulo Abadie Guedes Johan Liesén Elena Axamitova Nelson Langkamp Alexander Dejaco Stefan Hepp Martin Schoeberl Rasmus Pedersen Ed Anuff Peter Hilber Christof Pitter Wolfgang Puffitsch Statistics view Description JOP is the implementation of the Java Virtual Machine (JVM) as concrete machine in hardware. The design has been sucessfully implemented in low cost FPGA devices from Altera (ACEX 1K50, Cyclone) and Xilinx (Spartan II and Spartan-3). JOP is open-source under the GNU General Public License, version 3. Features Very small core: about 2000 LCs - 3000 LCs (configurable) fmax is 100 MHz in a Cyclone EP1C6 Real-time features: architecture designed to simplify WCET analysis cycle accurate time interrupt (not tick based) real-time enhanced thread model WISHBONE master Status VHDL files and and supporting tools for the design are available from OpenCores CVS. Further information can be found at http://www.jopdesign.com A wiki is available at http://www.jopwiki.com/