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Plasma - most MIPS I(TM) opcodes: Tracker : Internal/External RAM Monitor this item You will be notified via email when status of this item is changed or if somebody adds a comment. Your email   Internal/External RAM Type REQUEST Status CLOSED Hi, I looked I your VHDL code source and find 2 RAM: Internal and External. What is the aim of this two ram? is one for data and other for opcode? Where the opcode start? How to indicate to the compiler for mapping the memory? Thank you.   Stats Nobody is monitoring this item Progress   Submited date 11-Jul-2006 Submited by abdallah.meziti@g...   Assigned date 21-Oct-2006 Assigned to Steve Rhoads   Closed date 21-Oct-2006 Closed by Steve Rhoads Comments by Steve Rhoads on 12-Jul-2006 See the comments in plasma.h: #define RAM_INTERNAL_BASE 0x00000000 //8KB #define RAM_EXTERNAL_BASE 0x10000000 //1MB The 8KB internal RAM is used to hold a boot loader since the RAM contents are restored every time the FPGA is rebooted. The Plasma CPU starts executing at address 0 in the internal RAM. To control where the code is loaded I just use the linker option "ld -Ttext 0x0" or "ld -Ttext 0x10000000". See tools/makefile which has targets count and count2.   Add your comment Your email: Retype key: