/* ----------------------------------------------------------------------------
 *
 * linux.cfg -- Simulator configuration script file for Linux
 *
 * Copyright (C) 2001-2002, Marko Mlinar, markom@opencores.org
 * Copyright (C) 2008, Embecosm Limited <info@embecosm.com>
   
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the Free
 * Software Foundation; either version 2 of the License, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc., 675
 * Mass Ave, Cambridge, MA 02139, USA.
 *
 * ----------------------------------------------------------------------------
 *
 * This file is part of OpenRISC 1000 Architectural Simulator.  It contains
 * the configuration suitable for running the simple SoC examples described in
 * the Embecosm Applicatio Note. "Building a Loosely Timed SoC Model with OSCI
 * TLM 2.0: A Case Study Using the OpenRISC 1000 Or1ksim ISS"
 *
 * For explanation of the different fields, see the default simulation
 * configuration file supplied with or1ksim (sim.cfg).
 *
 * The "generic" section is an extension to or1ksim to support modeling of
 * external peripherals.
 *
 * $Id$
 *
 */


section memory
  type     = unknown
  name     = "RAM"
  ce       =          0
  mc       =          0
  baseaddr = 0x00000000
  size     = 0x00400000
  delayr   =          1
  delayw   =          2
end

section sim
  verbose         =          0
  debug           =          0
  profile         =          0
  history         =          0
  clkcycle        =         10ns
end

section cpu
  ver             =       0x12
  rev             =     0x0001
  superscalar     =          0
  hazards         =          0
  dependstats     =          0
  sbuf_len        =          0
end

section generic
  enabled         =          1
  baseaddr        = 0x90000000
  size            =          8
  byte_enabled    =          1
  hw_enabled      =          1
  word_enabled    =          1
  name            = "UART"
end

  /* Disabled Sections. The first two need all their additional fields due
     to a bug in Or1ksim */

section ic
  enabled         =   0
  nsets           = 512
  nways           =   1
  blocksize       =  16
  hitdelay        =  20
  missdelay       =  20
end

section dc
  enabled         =   0
  nsets           = 512
  nways           =   1
  blocksize       =  16
  load_hitdelay   =  20
  load_missdelay  =  20
  store_hitdelay  =  20
  store_missdelay =  20
end

section immu
  enabled = 0
end

section dmmu
  enabled = 0
end

section VAPI
  enabled = 0
end

section dma
  enabled = 0
end

section pm
  enabled = 0
end

section bpb
  enabled = 0
end

section debug
  enabled = 0
end

section uart
  enabled = 0
end

section ethernet
  enabled = 0
end

section gpio
  enabled = 0
end

section ata
  enabled = 0
end

section vga
  enabled = 0
end

section fb
  enabled = 0
end

section kbd
  enabled = 0
end

section mc
  enabled = 0
end