Subversion Repositories w11
[/] [w11/] [trunk/] [tools/] [bin/] [vbomconv] - Rev 15
Go to most recent revision | Compare with Previous | Blame | View Log
#!/usr/bin/perl -w# $Id: vbomconv 433 2011-11-27 22:04:39Z mueller $## Copyright 2007-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>## This program is free software; you may redistribute and/or modify it under# the terms of the GNU General Public License as published by the Free# Software Foundation, either version 2, or at your option any later version.## This program is distributed in the hope that it will be useful, but# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License# for complete details.## Revision History:# Date Rev Version Comment# 2011-11-27 433 1.9.2 use in ghdl_m -fexplicit when unisim used# 2011-08-13 405 1.9.1 always write 'vhdl' into xst prj files again; for# -xst_export: remove opt file export, add ucf_cpp# handling# 2011-06-26 385 1.9 add --ise_path, pass it to vbomconv --xst_prj# 2011-06-09 383 1.8.6 fix xst_vhdl.opt logic (use rtl/vlib now)# 2010-07-03 312 1.8.5 add --flist action# 2010-06-03 299 1.8.4 generate ucf->ncd dependencies in dep_xst# 2010-04-26 284 1.8.3 add _[sft]sim support for ISim# 2009-11-28 253 1.8.2 fixup print_help...;# 2009-11-22 252 1.8.1 add (export|dep)_isim, full ISim support;# add [isim] [sim], allow tag lists like [ghdl,isim];# --trace and messages to STDERR;# 2009-11-20 251 1.8 add isim_prj, first ISim support# 2008-03-09 124 1.7.3 add in .dep_(ghdl|xst) all dep on vbom dependencies# target now also dependant on .dep_ file# 2008-03-02 122 1.7.2 add @lib:<name> directive to include UNISIM# 2007-12-17 102 1.7.1 fix @ucf_cpp logic.# 2007-12-16 101 1.7 add @ucf_cpp pseudo tag (handle cpp'ed ucf files)# 2007-11-25 98 1.6.1 drop trailing blanks on input lines# 2007-11-02 94 1.6 added (xst|ghdl)_export# 2007-10-26 92 1.5.1 emit '--no-vital-checks' for --ghdl_m for _[sft]sim# 2007-10-14 98 1.5 handle .exe files under cycwin properly# 2007-09-15 82 1.4 handle C source objects properly# 2007-08-10 72 1.3 add [xst], [ghdl] prefix support# 2007-07-22 68 1.2 add "tag = val"; list files in 'ready to analyse'# order; add --ghdl_a option# 2007-07-08 65 1.1 add "tag : names"; inferral of _[ft]sim vboms# 2007-07-06 64 1.0 Initial versionuse 5.005; # require Perl 5.005 or higheruse strict; # require strict checkinguse FileHandle;use Getopt::Long;my %opts = ();GetOptions(\%opts, "help", "trace", "ise_path=s","dep_xst", "dep_ghdl", "dep_isim","xst_prj", "isim_prj","ghdl_a", "ghdl_a_cmd","ghdl_i", "ghdl_i_cmd","ghdl_m", "ghdl_m_cmd","xst_export=s","ghdl_export=s","isim_export=s","flist") || exit 1;sub print_help;sub read_vbom;sub scan_vbom;sub copy_edir;sub write_vbomdep;my @vbom_list;my @file_list;my %vbom_tbl;my %file_tbl;my %read_tbl;my %conf_tbl;my @ucf_cpp_list;my $is_xst = 0; # XST synthesis targetmy $is_ghdl = 0; # ghdl simulation targetmy $is_isim = 0; # ISim simulation targetmy $is_sim = 0; # simulation target (generic)my $is_any = 0;my $nactions = 0;my $top_vbom;my $stem;my $top;my $top_done = 0;my $has_unisim;my $has_simprim;my $is_ssim;my $is_fsim;my $is_tsim;my $do_trace = exists $opts{trace};my $level;my $xst_writevhdl = 1;# now using '-ifmt mixed', so language always needed (2011-08-13)#if (defined $opts{ise_path}) {# if ($opts{ise_path} =~ /^xc6s/) {# $xst_writevhdl = 0;# }#}autoflush STDOUT 1; # autoflush, so noting lost on exec laterif (exists $opts{help}) {print_help;exit 0;}# ensure that one and only one vbom is specifiedif (scalar(@ARGV) != 1) {print STDERR "%vbomconv-E: only one vbom file name allowed\n\n";print_help;exit 1;}# check that only one action is defined, mark xst, gdhl, or isim classforeach (keys %opts) {$nactions += 1 unless ($_ eq "trace" || $_ eq "ise_path");$is_xst = 1 if ($_ eq "dep_xst");$is_ghdl = 1 if ($_ eq "dep_ghdl");$is_isim = 1 if ($_ eq "dep_isim");$is_xst = 1 if ($_ =~ /^xst_/);$is_ghdl = 1 if ($_ =~ /^ghdl_/);$is_isim = 1 if ($_ =~ /^isim_/);$is_any = 1 if ($_ eq "flist");}$is_sim = $is_ghdl | $is_isim;print STDERR "-- [xst] active\n" if $do_trace && $is_xst;print STDERR "-- [ghdl] active\n" if $do_trace && $is_ghdl;print STDERR "-- [isim] active\n" if $do_trace && $is_isim;print STDERR "-- [sim] active\n" if $do_trace && $is_sim;if ($nactions > 1) {print STDERR "%vbomconv-E: only one action qualifier allowed\n\n";print_help;exit 1;}$top_vbom = $ARGV[0];$top_vbom .= ".vbom" unless $top_vbom =~ m{\.vbom$};$stem = $top_vbom;$stem =~ s{\..*$}{};$top = $stem;$top =~ s{^.*/}{};# now prepare virtual _fsim and _tsim vbom's# they are inferred from the _ssim vbom'sif ($top_vbom =~ m{_ssim\.vbom$}) { # detect _ssim$is_ssim = 1;}if ($top_vbom =~ m{_fsim\.vbom$}) { # map _fsim -> _ssim$is_fsim = 1;$top_vbom =~ s{_fsim\.vbom$}{_ssim.vbom};}if ($top_vbom =~ m{_tsim\.vbom$}) { # map _tsim -> _ssim$is_tsim = 1;$top_vbom =~ s{_tsim\.vbom$}{_ssim.vbom};}# traverse all vbom's start with command line argumentpush @vbom_list, $top_vbom;while (@vbom_list) {my $cur_vbom = shift @vbom_list;read_vbom($cur_vbom);}# traverse internal vbom representation to build file tablescan_vbom($top_vbom);# sort file table, build file list (decreasing rank)my @pair_list;foreach (keys %file_tbl) {push @pair_list, [$file_tbl{$_}, $_];}@file_list = map {$_->[1]} sort {$b->[0] <=> $a->[0]} @pair_list;# now generate output and actions, depending on options given# --trace ------------------------------------------------------------if ($do_trace) {print STDERR "\n";print STDERR "configuration table:\n";foreach (sort keys %conf_tbl) {print STDERR " $_ = $conf_tbl{$_}\n";}print STDERR "final file_list:\n";foreach (@file_list) {print STDERR " $_\n";}print STDERR "properties:\n";print STDERR " \@top: $top\n";}# --ghdh_a -- ghdl analysis command ----------------------------------if (exists $opts{ghdl_a} || exists $opts{ghdl_a_cmd}) {foreach (@file_list) {my $file = $_;my $cmd = "ghdl -a";$cmd .= ' -P$XILINX/ghdl/unisim' if $has_unisim;$cmd .= ' -P$XILINX/ghdl/simprim' if $has_simprim;$cmd .= " --ieee=synopsys";$cmd .= " $file";print "$cmd\n";if (exists $opts{ghdl_a}) {my $wrc = system "/bin/sh", "-c", $cmd;if ($wrc != 0) {my $rc = int($wrc/256);if ($rc == 0) {my $sig = $wrc % 256;print STDERR "%vbomconv-I compilation aborted by signal $sig\n";exit(1);} else {print STDERR "%vbomconv-I compilation failed (rc=$rc) $?\n";exit($rc);}}}}}# --ghdh_i -- ghdl inspection command --------------------------------if (exists $opts{ghdl_i} || exists $opts{ghdl_i_cmd}) {my %ghdl_work;# read ghdl "work-obj93.cf" file. It has the format# file . "<filename>" "<file_date>" "ghdl -i or -a date>":# entity <entity> at nn( nn) + nn on nn;# architecture <arch> of <entity> at nn( nn) + nn on nn;if (-r "work-obj93.cf") {open (WFILE, "work-obj93.cf") ordie "can't open for read work-obj93.cf: $!";while (<WFILE>) {if (m{^file \. \"(.*?)\"}) {$ghdl_work{$1} = 1;}}close (WFILE);}my $cmd = "ghdl -i";my $nfile = 0;foreach (@file_list) {next if /\.c$/; # skip C sources, only vhd handledif (not exists $ghdl_work{$_}) {$cmd .= " \\\n $_";$nfile += 1;}}if ($nfile) {print "$cmd\n";if (exists $opts{ghdl_i}) {exec "/bin/sh", "-c", $cmd;die "failed to exec /bin/sh -c $cmd: $!";}} else {print "# $cmd ## all files already inspected\n";}}# --ghdh_m -- ghdl make command --------------------------------------# Note: the 'buildin' make used by the -m option of ghdl does not# check for object files linked with -Wl, e.g. vhpi objects.# To force a re-elaboration the old executable is deleted first.# If used from make with proper dependencies, this will just do# the right thing.if (exists $opts{ghdl_m} || exists $opts{ghdl_m_cmd} ) {my $cmd = "";if (-r "$stem.exe") { # check for .exe, in case we are in cygwin$cmd .= "rm $stem.exe\n"; # rm old executable to force elaboration} elsif (-r $stem) { # otherwise$cmd .= "rm $stem\n" ; # rm old executable to force elaboration}$cmd .= "ghdl -m";$cmd .= " -o $stem";$cmd .= ' -fexplicit' if $has_unisim; # needed for ISE 13.1$cmd .= ' -P$XILINX/ghdl/unisim' if $has_unisim;$cmd .= ' -P$XILINX/ghdl/simprim' if $has_simprim;$cmd .= " --ieee=synopsys";$cmd .= " --no-vital-checks" if $is_ssim or $is_fsim or $is_tsim;foreach (@file_list) {next unless /\.c$/; # C source ?my $ofile = $_; # copy to break alias for following s///$ofile =~ s{^.*/}{}; # remove directory path$ofile =~ s/\.c$/.o/; # add clause to link C source object file$cmd .= " -Wl,$ofile";}$cmd .= " $top";print "$cmd\n";if (exists $opts{ghdl_m}) {exec "/bin/sh", "-c", $cmd;die "failed to exec /bin/sh -c $cmd: $!";}}# --xst_prj ----------------------------------------------------------if (exists $opts{xst_prj}) {foreach (@file_list) {if ($xst_writevhdl) {print "vhdl work $_\n";} else {print "work $_\n"; # for ISE S-6/V-6 compilations with '-ifmt VHDL'}}}# --isim_prj ---------------------------------------------------------if (exists $opts{isim_prj}) {foreach (@file_list) {print "vhdl work $_\n";}}# --dep_xst ----------------------------------------------------------if (exists $opts{dep_xst}) {print "#\n";print "$stem.ngc : $stem.dep_xst\n";print "#\n";foreach (@file_list) {print "$stem.ngc : $_\n";}# handle cpp preprocessed ucf'sforeach (@ucf_cpp_list) {my $file = $_;$file =~ s/\.ucf$//;print "#\n";print "$file.ncd : $file.ucf\n";print "include $file.dep_ucf_cpp\n";}# handle plain ucf'sif (scalar(@ucf_cpp_list)==0 && -r "$stem.ucf") {print "#\n";print "$stem.ncd : $stem.ucf\n";}write_vbomdep("$stem.dep_xst");}# --dep_ghdl ---------------------------------------------------------if (exists $opts{dep_ghdl}) {my $stem_fsim = $stem;my $stem_tsim = $stem;$stem_fsim =~ s/_ssim$/_fsim/;$stem_tsim =~ s/_ssim$/_tsim/;print "#\n";print "$stem : $stem.dep_ghdl\n";if ($is_ssim) {print "$stem_fsim : $stem.dep_ghdl\n";print "$stem_tsim : $stem.dep_ghdl\n";}print "#\n";foreach (@file_list) {if (/\.c$/) {my $ofile = $_; # copy to break alias for following s///$ofile =~ s{^.*/}{}; # remove directory path$ofile =~ s/\.c$/.o/; # object file nameprint "$stem : $ofile\n"; # depend on C source object file# C source object compilation dependenceopen (ODEPFILE, ">$ofile.dep_ghdl") ordie "can't write $ofile.dep_ghdl: $!";print ODEPFILE "$ofile : $_\n";print ODEPFILE "\t\$(COMPILE.c) \$(OUTPUT_OPTION) \$<\n";close ODEPFILE;} else {print "$stem : $_\n";}}if ($is_ssim) {foreach (@file_list) {my $file = $_; # copy to break alias for following s///if (/\.c$/) {$file =~ s{^.*/}{}; # remove directory path$file =~ s/\.c$/.o/; # depend on object file for C sources} else {$file =~ s/_ssim\.vhd$/_fsim.vhd/;}print "$stem_fsim : $file\n";}foreach (@file_list) {my $file = $_; # copy to break alias for following s///if (/\.c$/) {$file =~ s{^.*/}{}; # remove directory path$file =~ s/\.c$/.o/; # depend on object file for C sources} else {$file =~ s/_ssim\.vhd$/_tsim.vhd/;}print "$stem_tsim : $file\n";}}write_vbomdep("$stem.dep_ghdl");}# --dep_isim ---------------------------------------------------------if (exists $opts{dep_isim}) {my $stem_isim = $stem . "_ISim";$stem_isim =~ s/_ssim_ISim$/_ISim_ssim/ if ($is_ssim);my $stem_fsim_isim = $stem_isim;my $stem_tsim_isim = $stem_isim;$stem_fsim_isim =~ s/_ssim$/_fsim/;$stem_tsim_isim =~ s/_ssim$/_tsim/;print "#\n";print "$stem_isim : $stem.dep_isim\n";if ($is_ssim) {print "$stem_fsim_isim : $stem.dep_isim\n";print "$stem_tsim_isim : $stem.dep_isim\n";}print "#\n";foreach (@file_list) {print "$stem_isim : $_\n";}if ($is_ssim) {foreach (@file_list) {my $file = $_; # copy to break alias for following s///$file =~ s/_ssim\.vhd$/_fsim.vhd/;print "$stem_fsim_isim : $file\n";}foreach (@file_list) {my $file = $_; # copy to break alias for following s///$file =~ s/_ssim\.vhd$/_tsim.vhd/;print "$stem_tsim_isim : $file\n";}}write_vbomdep("$stem.dep_isim");}# --xst_export or ghdl_export or isim_export -------------------------if (exists $opts{xst_export} orexists $opts{ghdl_export} orexists $opts{isim_export}) {my $edir;$edir = $opts{xst_export} if exists $opts{xst_export};$edir = $opts{ghdl_export} if exists $opts{ghdl_export};$edir = $opts{isim_export} if exists $opts{isim_export};if (not -d $edir) {print STDERR "%vbomconv-I: create target directory $edir\n";system("mkdir -p $edir") == 0 or die "mkdir failed: $?";} else {print STDERR "%vbomconv-I: target directory $edir already exists\n";}open(PFILE, ">$edir/$stem.prj") or die "can't write open $edir/$stem.prj: $!";foreach (@file_list) {my $fname = $_;my $fdpath = ".";if (m{(.*)/(.*)}) {$fname = $2;$fdpath = $1;}copy_edir($_, $edir);print PFILE "vhdl work $fname\n";}close(PFILE);# Note: currently no xflow opt files exported !!if (exists $opts{xst_export}) {open(XFILE, ">$edir/$stem.xcf") ordie "can't write open $edir/$stem.xcf: $!";close(XFILE);foreach(glob("*.xcf")) { copy_edir($_, $edir); }if (-r "$stem.ucf_cpp") {system "/bin/sh", "-c", "make $stem.ucf";}foreach(glob("*.ucf")) { copy_edir($_, $edir); }}}# --flist ------------------------------------------------------------if (exists $opts{flist}) {my @flist;push @flist, @file_list;push @flist, sort keys %read_tbl;if (scalar(@ucf_cpp_list)) {foreach (@ucf_cpp_list) {push @flist, $_."_cpp";}} else {if (-r "$stem.ucf") {push @flist, "$stem.ucf";}}foreach (sort @flist) {my $fname = $_;my $fdpath = ".";if (m{(.*)/(.*)}) {$fname = $2;$fdpath = $1;}print "$fdpath/$fname\n";}}#-------------------------------------------------------------------------------sub read_vbom {my ($vbom) = @_;print STDERR "-- open $vbom\n" if $do_trace;open (IFILE, $vbom) or die "can't open for read $vbom: $!";my $vbom_path = "";my $vbom_file = $vbom;if ($vbom =~ m{^(.*)/([a-zA-Z0-9_.]*)$}) {$vbom_path = $1;$vbom_file = $2;}$read_tbl{$vbom} += 1; # mark this vbom already readwhile (<IFILE>) {chomp;next if /^\s*#/; # drop commentsnext if /^\s*$/; # drop empty liness/\s*$//; # drop trailing blanksif (/^\[([a-z,]+)\]\s*(.+)$/) { # [xxx,yyy] tag seenmy $qual = $1;my $name = $2;my $keep = $is_any;## print STDERR "+++1 |$qual|$name|$vbom|\n";foreach my $pref (split /,/,$qual) {if ($pref =~ /^(xst|ghdl|isim|sim)$/) {$keep = 1 if ($pref eq "xst" && $is_xst);$keep = 1 if ($pref eq "ghdl" && $is_ghdl);$keep = 1 if ($pref eq "isim" && $is_isim);$keep = 1 if ($pref eq "sim" && $is_sim);} else {print STDERR "%vbomconv-W: unknown tag [$pref] in $vbom_file\n";}}if (not $keep) {print STDERR "--- drop \"$_\"\n" if $do_trace;next;}$_ = $name; # remove [xxx] tag}my $tag;my $val = $_;my $del;# detect tag=val or tag:val linesif (m{^\s*(.*?)\s*([=:])\s*(.*?)\s*$}) {$tag = $1;$del = $2;$val = $3;}# process @top:<entity> linesif (defined $del && $del eq ":" && $tag eq '@top') {$top = $val unless $top_done;next;}# process @ucf_cpp:<file> linesif (defined $del && $del eq ":" && $tag eq '@ucf_cpp') {push @ucf_cpp_list, $val;next;}# process @lib:<name> linesif (defined $del && $del eq ":" && $tag eq '@lib') {if ($val eq 'unisim') {$has_unisim = 1;} elsif ($val eq 'simprim') {$has_simprim = 1;} else {die "unknown library type: $val";}next;}# now do _fsim, _tsim mapping$val =~ s{_ssim\.vhd$}{_fsim.vhd} if $is_fsim;$val =~ s{_ssim\.vhd$}{_tsim.vhd} if $is_tsim;# process normal .vhd or .vbom file lines# get full relative file name (relative to cwd)my $fname = $val;$fname = "$vbom_path/$fname" if $vbom_path ne "";# remove 'inner' .., e.g. ../x/../y --> ../y# this will also canonize the file names, thus same file same namemy @flist;foreach (split "/",$fname) {if (scalar(@flist) && $flist[$#flist] ne ".." && $_ eq "..") {pop @flist;} else {push @flist, $_;}}my $fullname = join "/", @flist;# determine whether additional libs neededif ($fullname =~ m{_ssim\.vhd$}) { # ends in _ssim.vhd$has_unisim = 1;}if ($fullname =~ m{_[ft]sim\.vhd$}) { # ends in _fsim.vhd or _tsim.vhd$has_simprim = 1;}# handle configuration statements (tag=val)if (defined $del && $del eq "=") {if (exists $conf_tbl{$tag}) {print STDERR "--- ignore $tag = $fullname\n" if $do_trace;} else {$conf_tbl{$tag} = $fullname;print STDERR "--- config $tag = $fullname\n" if $do_trace;}next;}# handle configurable lines (tag:val)if (defined $del && $del eq ":") {if (exists $conf_tbl{$tag}) {$fullname = $conf_tbl{$tag};print STDERR "--- use $tag = $fullname\n" if $do_trace;} else {print STDERR "--- use $tag = $fullname (default)\n" if $do_trace;}}# build vbom tablepush @{$vbom_tbl{$vbom}}, $fullname;print STDERR "--- add $fullname\n" if $do_trace;# if a vbom, queue if not not already readif ($fullname =~ m{\.vbom$} && not exists $read_tbl{$fullname} ) {push @vbom_list, $fullname;print STDERR "--- queue $fullname\n" if $do_trace;}}$top_done = 1;close (IFILE);}#-------------------------------------------------------------------------------sub scan_vbom {my ($vbom) = @_;$level += 1;my $rank = 1000*$level + scalar(@{$vbom_tbl{$vbom}});print STDERR "--> $level: $vbom\n" if $do_trace;die "%vbomcov-E excessive vbom stack depth \n" if $level>=1000;foreach (@{$vbom_tbl{$vbom}}) {my $file = $_;$rank -= 1;if (m{\.vbom$}) {scan_vbom($file);} else {if (exists $file_tbl{$file}) {if ($rank > $file_tbl{$file}) {print STDERR " $file $file_tbl{$file} -> $rank\n" if $do_trace;$file_tbl{$file} = $rank;} else {print STDERR " $file $file_tbl{$file} (keep)\n" if $do_trace;}} else {$file_tbl{$file} = $rank;print STDERR " $file $file_tbl{$file} (new)\n" if $do_trace;}}}print STDERR "<-- $level: $vbom\n" if $do_trace;$level -= 1;}#-------------------------------------------------------------------------------sub copy_edir {my ($file, $edir) = @_;print "cp -p $file $edir\n";system("cp -p $file $edir")==0 or die "cp -p failed: $?";}#-------------------------------------------------------------------------------sub write_vbomdep {my ($target) = @_;print "#\n";print "# .dep_ on .vbom dependencies\n";print "#\n";foreach (sort keys %read_tbl) {print "$target : $_\n";}}#-------------------------------------------------------------------------------sub print_help {print "usage: vbomconf <command> file.vbom\n";print " --help this message\n";print " --trace trace recursive processing of vbom's\n";print " --dep_xst generate xst dependencies for make (on stdout)\n";print " --dep_ghdl generate ghdl dependencies for make (on stdout)\n";print " --dep_isim generate isim dependencies for make (on stdout)\n";print " --xst_prj generate xst project file (on stdout)\n";print " --isim_prj generate isim project file (on stdout)\n";print " --ghdl_a generate and execute ghdl -a (analyse)\n";print " --ghdl_a_cmd like ghdl_a, but only print command, no exec\n";print " --ghdl_i generate and execute ghdl -i (inspect)\n";print " --ghdl_i_cmd like ghdl_i, but only print command, no exec\n";print " --ghdl_m generate and execute ghdl -m (make)\n";print " --ghdl_m_cmd like ghdl_m, but only print command, no exec\n";print " --xst_export=s export all xst source files into directory s\n";print " --ghdl_export=s export all ghdl source files into directory s\n";print " --isim_export=s export all isim source files into directory s\n";print " --flist list all files touched by vbom for all tags\n";}
Go to most recent revision | Compare with Previous | Blame | View Log
