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[/] [socgen/] [trunk/] [projects/] [opencores.org/] [xfer/] - Rev 126

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Rev Log message Author Age Path
126 added mor1kx
cleanup		 jt_eaton 51d 17h /socgen/trunk/projects/opencores.org/xfer/
125 Added two new 6502 cores in www.6502.org

cleaned up sogen xml files and added module name control		 jt_eaton 96d 11h /socgen/trunk/projects/opencores.org/xfer/
124 beta release candidate 1
changed design.xml name
aligned schema with filesystem		 jt_eaton 149d 14h /socgen/trunk/projects/opencores.org/xfer/
122 Moved Nexys2 from opencores.org to digilentinc.com
Moved jtag_rpc and or1k Busdefs into cde_jtag and or1200 components		 jt_eaton 172d 10h /socgen/trunk/projects/opencores.org/xfer/
121 cleaned up sims, added autogenerated test bench files
removed mrisc and experimental or1k code		 jt_eaton 192d 16h /socgen/trunk/projects/opencores.org/xfer/
120 clean up componentGenerators names and directories
sim + lint now synthesis TestBench		 jt_eaton 210d 16h /socgen/trunk/projects/opencores.org/xfer/
119 moved copyright files into /verilog
changed cde copyright to apache from gplv3
split out tools into separate subdirectories
changed design.xml files to socgen: namespace		 jt_eaton 245d 10h /socgen/trunk/projects/opencores.org/xfer/
118 optimized gen_verilog
added padring support
added configuration support
added jtag sims
added accellera candidate bus defs		 jt_eaton 280d 19h /socgen/trunk/projects/opencores.org/xfer/
117 added yellow pages tools jt_eaton 308d 14h /socgen/trunk/projects/opencores.org/xfer/
116 added build_header
now use build_register for all spr components
resynced or1200 code back to use orbuild toolchain		 jt_eaton 343d 11h /socgen/trunk/projects/opencores.org/xfer/
115 split or1200_cpu up into all ip-xact components
removed dead files		 jt_eaton 387d 16h /socgen/trunk/projects/opencores.org/xfer/
108 removed unneeded files jt_eaton 432d 19h /socgen/trunk/projects/opencores.org/xfer/
107 added designCfg files to all modules jt_eaton 432d 21h /socgen/trunk/projects/opencores.org/xfer/
103 added user guide
resynced to local repository		 jt_eaton 463d 12h /socgen/trunk/projects/opencores.org/xfer/
101 Added new designs for minsoc release candidate
convert tool set to parse proper ip-xact

THIS WILL BREAK ALL THE OLD DESIGNS UNTIL I FIX THEIR IP_XACT		 jt_eaton 526d 09h /socgen/trunk/projects/opencores.org/xfer/

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