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miniuart2 WebSVN RSS feed - miniuart2 https://opencores.org/websvn//websvn/listing?repname=miniuart2&path=%2Fminiuart2%2Ftrunk%2F& Thu, 28 Mar 2024 19:45:01 +0100 FeedCreator 1.7.2 ... https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Fminiuart2%2Ftrunk%2F&rev=26 <div><strong>Rev 26 - root</strong> (2 file(s) modified)</div><div>...</div>+ /miniuart2/trunk<br />- /trunk<br /> root Wed, 06 May 2009 08:33:21 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Fminiuart2%2Ftrunk%2F&rev=26 This commit was generated by cvs2svn to compensate for changes ... https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=23 <div><strong>Rev 23 - philippe</strong> (279 file(s) modified)</div><div>This commit was generated by cvs2svn to compensate for changes ...</div>+ /trunk/impl/Xilinx_xc2s15<br />+ /trunk/impl/Xilinx_xc2s15/automake.err<br />+ /trunk/impl/Xilinx_xc2s15/automake.log<br />+ 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/trunk/sim/ModelSim/work/synchroniser/_primary.dat<br />+ /trunk/sim/ModelSim/work/test_miniuart<br />+ /trunk/sim/ModelSim/work/test_miniuart/arch_test_bench.dat<br />+ /trunk/sim/ModelSim/work/test_miniuart/arch_test_bench.psm<br />+ /trunk/sim/ModelSim/work/test_miniuart/_primary.dat<br />+ /trunk/sim/ModelSim/work/txunit<br />+ /trunk/sim/ModelSim/work/txunit/behaviour.dat<br />+ /trunk/sim/ModelSim/work/txunit/behaviour.psm<br />+ /trunk/sim/ModelSim/work/txunit/_primary.dat<br />+ /trunk/sim/ModelSim/work/uart<br />+ /trunk/sim/ModelSim/work/uart/behaviour.dat<br />+ /trunk/sim/ModelSim/work/uart/behaviour.psm<br />+ /trunk/sim/ModelSim/work/uart/_primary.dat<br />+ /trunk/sim/ModelSim/work/work<br />+ /trunk/sim/ModelSim/work/work/acq_rx_uart<br />+ /trunk/sim/ModelSim/work/work/acq_rx_uart/arch_comportementale.dat<br />+ /trunk/sim/ModelSim/work/work/acq_rx_uart/arch_comportementale.psm<br />+ /trunk/sim/ModelSim/work/work/acq_rx_uart/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/conv_pkg<br />+ /trunk/sim/ModelSim/work/work/conv_pkg/body.dat<br />+ /trunk/sim/ModelSim/work/work/conv_pkg/body.psm<br />+ /trunk/sim/ModelSim/work/work/conv_pkg/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/conv_pkg/_vhdl.psm<br />+ /trunk/sim/ModelSim/work/work/gen_tx_uart<br />+ /trunk/sim/ModelSim/work/work/gen_tx_uart/arch_comportementale.dat<br />+ /trunk/sim/ModelSim/work/work/gen_tx_uart/arch_comportementale.psm<br />+ /trunk/sim/ModelSim/work/work/gen_tx_uart/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/gen_wave<br />+ /trunk/sim/ModelSim/work/work/gen_wave/arch_comportementale.dat<br />+ /trunk/sim/ModelSim/work/work/gen_wave/arch_comportementale.psm<br />+ /trunk/sim/ModelSim/work/work/gen_wave/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/gen_wave_bus<br />+ /trunk/sim/ModelSim/work/work/gen_wave_bus/arch_comportementale.dat<br />+ /trunk/sim/ModelSim/work/work/gen_wave_bus/arch_comportementale.psm<br />+ /trunk/sim/ModelSim/work/work/gen_wave_bus/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/horloge<br />+ /trunk/sim/ModelSim/work/work/horloge/arch_comportementale.dat<br />+ /trunk/sim/ModelSim/work/work/horloge/arch_comportementale.psm<br />+ /trunk/sim/ModelSim/work/work/horloge/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/ram<br />+ /trunk/sim/ModelSim/work/work/ram/arch_comportementale.dat<br />+ /trunk/sim/ModelSim/work/work/ram/arch_comportementale.psm<br />+ /trunk/sim/ModelSim/work/work/ram/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/rom<br />+ /trunk/sim/ModelSim/work/work/rom/arch_comportementale.dat<br />+ /trunk/sim/ModelSim/work/work/rom/arch_comportementale.psm<br />+ /trunk/sim/ModelSim/work/work/rom/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/text_pkg<br />+ /trunk/sim/ModelSim/work/work/text_pkg/body.dat<br />+ /trunk/sim/ModelSim/work/work/text_pkg/body.psm<br />+ /trunk/sim/ModelSim/work/work/text_pkg/_primary.dat<br />+ /trunk/sim/ModelSim/work/work/text_pkg/_vhdl.psm<br />+ /trunk/sim/ModelSim/work/work/_info<br />+ /trunk/sim/ModelSim/work/_info<br /> philippe Mon, 13 Jan 2003 00:47:32 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=23 This commit was generated by cvs2svn to compensate for changes ... https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=20 <div><strong>Rev 20 - philippe</strong> (2 file(s) modified)</div><div>This commit was generated by cvs2svn to compensate for changes ...</div>+ /trunk/sim/Foundation sim<br />+ /trunk/sim/Foundation sim/TESTRx.CMD<br /> philippe Mon, 13 Jan 2003 00:41:41 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=20 no message https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=19 <div><strong>Rev 19 - philippe</strong> (40 file(s) modified)</div><div>no message</div>+ /branches/avendor/sim/Foundation sim<br />+ /branches/avendor/sim/Foundation sim/TESTRx.CMD<br />+ /trunk/impl/info.txt<br />+ /trunk/impl/Xilinx_xcs10<br />+ /trunk/impl/Xilinx_xcs10/Xilinx<br />+ /trunk/impl/Xilinx_xcs10/XILINX.PDF<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/express.ini<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.BLK<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.DIR<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.FIG<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.FLG<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.GNR<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.HDR<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.ID<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.INI<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.MAP<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.MOD<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.NET<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.PIN<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.SYM<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.SYN<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/lib/XILINX.VIS<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/miniuart.log<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/miniuart.vhd<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/rxunit.log<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/Rxunit.vhd<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/txunit.log<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/Txunit.vhd<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/utils.log<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/utils.vhd<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xilinx<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xilinx.alb<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xilinx.bit<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xilinx.EDF<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xilinx.ll<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xilinx.prj<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xilinx.ucf<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xilinx/xilinx.exp<br />+ /trunk/impl/Xilinx_xcs10/Xilinx/xproj.ini<br /> philippe Mon, 13 Jan 2003 00:41:41 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=19 no message https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=18 <div><strong>Rev 18 - philippe</strong> (1 file(s) modified)</div><div>no message</div>- /trunk/rtl/vhdl/S95.log<br /> philippe Fri, 10 Jan 2003 00:19:29 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=18 Header and formating modif modif on line 81: ... https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=17 <div><strong>Rev 17 - philippe</strong> (1 file(s) modified)</div><div>Header and formating modif<br /> modif on line 81: ...</div>~ /trunk/rtl/vhdl/Rxunit.vhd<br /> philippe Fri, 10 Jan 2003 00:18:31 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=17 Header and formating modif https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=16 <div><strong>Rev 16 - philippe</strong> (3 file(s) modified)</div><div>Header and formating modif</div>~ /trunk/rtl/vhdl/miniuart.vhd<br />~ /trunk/rtl/vhdl/Txunit.vhd<br />~ /trunk/rtl/vhdl/utils.vhd<br /> philippe Fri, 10 Jan 2003 00:17:10 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=16 changed mail address https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=15 <div><strong>Rev 15 - philippe</strong> (9 file(s) modified)</div><div>changed mail address</div>~ /trunk/doc/MiniUart.pdf<br />~ /trunk/doc/src/MiniUART.doc<br />~ /trunk/rtl/vhdl/miniuart.vhd<br />~ /trunk/rtl/vhdl/Rxunit.vhd<br />~ /trunk/rtl/vhdl/Txunit.vhd<br />~ /trunk/rtl/vhdl/utils.vhd<br />~ /trunk/sw/TestCom/mainUs.cpp<br />~ /trunk/sw/TestCom/Readme.txt<br />~ /trunk/sw/TestCom/TestCom.exe<br /> philippe Wed, 11 Sep 2002 00:23:31 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=15 no message https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=14 <div><strong>Rev 14 - philippe</strong> (13 file(s) modified)</div><div>no message</div>+ /trunk/impl<br />+ /trunk/impl/Xilinx<br />+ /trunk/impl/Xilinx/log<br />+ /trunk/impl/Xilinx/log/map.rtf<br />+ /trunk/impl/Xilinx/log/par.rtf<br />+ /trunk/impl/Xilinx/out<br />+ /trunk/impl/Xilinx/out/info.txt<br />+ /trunk/impl/Xilinx/out/miniuart.edf<br />+ /trunk/syn<br />+ /trunk/syn/Xilinx<br />+ /trunk/syn/Xilinx/log<br />+ /trunk/syn/Xilinx/log/ver1-optimized.chp<br />+ /trunk/syn/Xilinx/log/ver1.chp<br /> philippe Tue, 07 May 2002 20:44:39 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=14 no message https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=13 <div><strong>Rev 13 - philippe</strong> (2 file(s) modified)</div><div>no message</div>+ /trunk/doc/implXilinx.pdf<br />+ /trunk/doc/src/impl Xilinx.doc<br /> philippe Tue, 07 May 2002 20:32:49 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=13 Asserted TxD High on power on. (Added the line TxD ... https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=12 <div><strong>Rev 12 - philippe</strong> (1 file(s) modified)</div><div>Asserted TxD High on power on. (Added the line TxD ...</div>~ /trunk/rtl/vhdl/Txunit.vhd<br /> philippe Tue, 07 May 2002 20:28:19 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=12 no message https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=11 <div><strong>Rev 11 - philippe</strong> (1 file(s) modified)</div><div>no message</div>+ /trunk/sim/rtl_sim/bin/TESTTx.CMD<br /> philippe Mon, 25 Mar 2002 20:24:45 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=11 Prohibited SampleCnt to overflow over 3. (This is just a security-not ... https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=10 <div><strong>Rev 10 - philippe</strong> (1 file(s) modified)</div><div>Prohibited SampleCnt to overflow over 3.<br /> (This is just a security-not ...</div>~ /trunk/rtl/vhdl/Rxunit.vhd<br /> philippe Mon, 25 Mar 2002 20:23:24 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=10 Corrected bug on LoadA signal in Txunit.vhd. Load signal is now ... https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=9 <div><strong>Rev 9 - philippe</strong> (1 file(s) modified)</div><div>Corrected bug on LoadA signal in Txunit.vhd.<br /> Load signal is now ...</div>~ /trunk/rtl/vhdl/Txunit.vhd<br /> philippe Mon, 25 Mar 2002 20:18:25 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=9 Modified and detailed the Baudrate tolerance section https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=8 <div><strong>Rev 8 - philippe</strong> (2 file(s) modified)</div><div>Modified and detailed the Baudrate tolerance section</div>~ /trunk/doc/MiniUart.pdf<br />~ /trunk/doc/src/MiniUART.doc<br /> philippe Tue, 05 Mar 2002 22:41:10 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=8 no message https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=7 <div><strong>Rev 7 - philippe</strong> (1 file(s) modified)</div><div>no message</div>+ /trunk/sim/rtl_sim/bin/TESTRxLimit.CMD<br /> philippe Tue, 05 Mar 2002 22:37:38 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=7 Modified signal names to match port map https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=6 <div><strong>Rev 6 - philippe</strong> (1 file(s) modified)</div><div>Modified signal names to match port map</div>~ /trunk/sim/rtl_sim/bin/TESTRx.CMD<br /> philippe Tue, 05 Mar 2002 22:35:03 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=6 no message https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=5 <div><strong>Rev 5 - philippe</strong> (1 file(s) modified)</div><div>no message</div>~ /trunk/sw/TestCom/Readme.txt<br /> philippe Tue, 29 Jan 2002 22:45:40 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=5 This commit was generated by cvs2svn to compensate for changes ... https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=3 <div><strong>Rev 3 - philippe</strong> (30 file(s) modified)</div><div>This commit was generated by cvs2svn to compensate for changes ...</div>+ /trunk/doc<br />+ /trunk/doc/MiniUart.pdf<br />+ /trunk/doc/src<br />+ /trunk/doc/src/MiniUART.doc<br />+ /trunk/rtl<br />+ /trunk/rtl/vhdl<br />+ /trunk/rtl/vhdl/miniuart.vhd<br />+ /trunk/rtl/vhdl/Rxunit.vhd<br />+ /trunk/rtl/vhdl/S95.log<br />+ /trunk/rtl/vhdl/Txunit.vhd<br />+ /trunk/rtl/vhdl/utils.vhd<br />+ /trunk/sim<br />+ /trunk/sim/rtl_sim<br />+ /trunk/sim/rtl_sim/bin<br />+ /trunk/sim/rtl_sim/bin/TESTRx.CMD<br />+ /trunk/sim/rtl_sim/bin/TESTUART.CMD<br />+ /trunk/sw<br />+ /trunk/sw/TestCom<br />+ /trunk/sw/TestCom/Main.h<br />+ /trunk/sw/TestCom/mainFr.cpp<br />+ /trunk/sw/TestCom/mainUs.cpp<br />+ /trunk/sw/TestCom/mainUs.obj<br />+ /trunk/sw/TestCom/Readme.txt<br />+ /trunk/sw/TestCom/TestCom.bpf<br />+ /trunk/sw/TestCom/TestCom.bpr<br />+ /trunk/sw/TestCom/TestCom.dsk<br />+ /trunk/sw/TestCom/TestCom.exe<br />+ /trunk/sw/TestCom/Thread.cpp<br />+ /trunk/sw/TestCom/Thread.h<br />+ /trunk/sw/TestCom/Thread.obj<br /> philippe Tue, 29 Jan 2002 22:08:38 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=3 Standard project directories initialized by cvs2svn. https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=1 <div><strong>Rev 1 - </strong> (3 file(s) modified)</div><div>Standard project directories initialized by cvs2svn.</div>+ /branches<br />+ /tags<br />+ /trunk<br /> Tue, 29 Jan 2002 22:08:38 +0100 https://opencores.org/websvn//websvn/revision?repname=miniuart2&path=%2Ftrunk%2F&rev=1
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