OpenCores

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socgen WebSVN RSS feed - socgen http://opencores.org/websvn,listing?repname=socgen&path=%2Fsocgen%2Ftrunk%2F& Thu, 23 May 2013 14:38:10 +0100 FeedCreator 1.7.2 added work dir http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=69 <div>Rev 69 - jt_eaton (1 file(s) modified)</div><div>added work dir</div>+ /socgen/trunk/work jt_eaton Sat, 16 Oct 2010 02:17:22 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=69 moved to seperate components http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=68 <div>Rev 68 - jt_eaton (2 file(s) modified)</div><div>moved to seperate components</div>- /socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/inst_decode.v - /socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/state_fsm.v jt_eaton Wed, 13 Oct 2010 02:37:08 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=68 updated installs http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=67 <div>Rev 67 - jt_eaton (7 file(s) modified)</div><div>updated installs</div>~ /socgen/trunk/doc/src/png/data_fig2.png - /socgen/trunk/tools/bin/Makefile.root.x10 - /socgen/trunk/tools/bin/Makefile.root.x11 ~ /socgen/trunk/tools/install/crasm/Makefile ~ /socgen/trunk/tools/install/Fedora_13/Readme.txt ~ /socgen/trunk/tools/install/Ubuntu_10.4/Makefile ~ /socgen/trunk/tools/install/Ubuntu_10.10/Makefile jt_eaton Wed, 13 Oct 2010 02:27:20 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=67 converted sims to use parameters added msp and 6502 software installs http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=66 <div>Rev 66 - jt_eaton (148 file(s) modified)</div><div>converted sims to use parameters added msp and 6502 software installs</div>~ /socgen/trunk/bench/verilog/TestBench ~ /socgen/trunk/projects/logic/ip/disp_io/sim/run/default/dut ~ /socgen/trunk/projects/logic/ip/disp_io/sim/run/default/test_define ~ /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/run/default/dut ~ /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/io_module/sim/run/default/dut ~ /socgen/trunk/projects/logic/ip/io_module/sim/run/mouse/dut ~ /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/dut ~ /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/mouse/dut ~ /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/mouse/params.sim ~ /socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/dut ~ /socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/test_define ~ /socgen/trunk/projects/logic/ip/uart/sim/run/default/dut ~ /socgen/trunk/projects/logic/ip/uart/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/uart/sim/run/divide/dut ~ /socgen/trunk/projects/logic/ip/uart/sim/run/divide/params.sim ~ /socgen/trunk/projects/logic/ip/usb_epp/sim/run/default/dut ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/dut ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/TB.defs ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/dut ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/params.sim ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/variants/T6502/defines.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/control.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/cpu.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/sequencer.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/xml/T6502.xml ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/inst_2_test/dut ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_irq_2/dut ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll_2/dut ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/irq_2_test/dut ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/kim_2/dut ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/tim_2/dut ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/tim_2/params.sim ~ /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/dut + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/bin + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/bin/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/copyright.v + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/geda + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/geda/drawing + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/geda/drawing/filelist + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/geda/drawing/sch + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/geda/drawing/sym + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/html + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/orig6502.txt + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/png + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/Readme.txt + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/spec.odt + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/T6502_doc.txt + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/doc/timing + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/rtl + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/rtl/variants + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/rtl/variants/T6502_inst_decode + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/rtl/variants/T6502_inst_decode/defines.v + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/rtl/verilog + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/rtl/verilog/top.v + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/rtl/xml + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/rtl/xml/T6502_inst_decode.xml + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim/bin + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim/bin/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim/cov + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim/cov/T6502_inst_decode + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim/cov/T6502_inst_decode/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim/log + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim/out + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/sim/run + /socgen/trunk/projects/Mos6502/ip/T6502_inst_decode/syn + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/bin + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/bin/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/copyright.v + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/geda + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/geda/drawing + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/geda/drawing/filelist + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/geda/drawing/sch + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/geda/drawing/sym + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/html + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/orig6502.txt + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/png + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/Readme.txt + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/spec.odt + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/T6502_doc.txt + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/doc/timing + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/rtl + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/rtl/variants + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/rtl/variants/T6502_state_fsm + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/rtl/variants/T6502_state_fsm/defines.v + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/rtl/verilog + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/rtl/verilog/top.v + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/rtl/xml + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/rtl/xml/T6502_state_fsm.xml + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim/bin + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim/bin/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim/cov + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim/cov/T6502_state_fsm + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim/cov/T6502_state_fsm/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim/log + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim/out + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/sim/run + /socgen/trunk/projects/Mos6502/ip/T6502_state_fsm/syn ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/dut ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/params.sim ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/TB.defs ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/dut ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/params.sim ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/TB.defs ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/dut ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/params.sim ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/TB.defs ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/dut ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/params.sim ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/TB.defs ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/dut ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/params.sim ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/TB.defs ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/test_define ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/dut ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/params.sim ~ /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/TB.defs ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/dut ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/params.sim ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/TB.defs ~ /socgen/trunk/tools/bin/soc_link + /socgen/trunk/tools/install/crasm + /socgen/trunk/tools/install/crasm/Makefile + /socgen/trunk/tools/install/msp430-gcc-4.4.3 + /socgen/trunk/tools/install/msp430-gcc-4.4.3/Makefile + /socgen/trunk/tools/install/msp430-gcc-4.4.3/Readme.txt ~ /socgen/trunk/tools/install/Ubuntu_10.10/Makefile + /socgen/trunk/tools/Jtag_programmers + /socgen/trunk/tools/Jtag_programmers/debug + /socgen/trunk/tools/Jtag_programmers/debug/fpga_load + /socgen/trunk/tools/Jtag_programmers/debug/impact_bat + /socgen/trunk/tools/Jtag_programmers/etc + /socgen/trunk/tools/Jtag_programmers/etc/udev + /socgen/trunk/tools/Jtag_programmers/etc/udev/rules.d + /socgen/trunk/tools/Jtag_programmers/etc/udev/rules.d/40-basic-permissions.rules + /socgen/trunk/tools/Jtag_programmers/etc/udev/rules.d/xusbdfwu.rules + /socgen/trunk/tools/Jtag_programmers/Makefile + /socgen/trunk/tools/Jtag_programmers/README.txt jt_eaton Tue, 12 Oct 2010 03:05:25 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=66 added params.sim to sims updated install's http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=65 <div>Rev 65 - jt_eaton (68 file(s) modified)</div><div>added params.sim to sims updated install's</div>~ /socgen/trunk/bench/verilog/TestBench ~ /socgen/trunk/doc/src/drawing/sch/data_fig1.sch ~ /socgen/trunk/doc/src/drawing/sch/data_fig2.sch ~ /socgen/trunk/doc/src/png/data_fig1.png ~ /socgen/trunk/doc/src/png/data_fig2.png ~ /socgen/trunk/projects/logic/ip/disp_io/rtl/xml/disp_io.xml + /socgen/trunk/projects/logic/ip/disp_io/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/flash_memcontrl/rtl/xml/flash_memcontrl.xml + /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/io_module/rtl/xml/io_module.xml ~ /socgen/trunk/projects/logic/ip/io_module/rtl/xml/io_module_mouse.xml + /socgen/trunk/projects/logic/ip/io_module/sim/run/default/params.sim + /socgen/trunk/projects/logic/ip/io_module/sim/run/mouse/params.sim ~ /socgen/trunk/projects/logic/ip/ps2_interface/rtl/xml/ps2_interface.xml + /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/params.sim + /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/mouse/params.sim ~ /socgen/trunk/projects/logic/ip/serial_rcvr/rtl/xml/serial_rcvr.xml + /socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/uart/rtl/xml/uart.xml + /socgen/trunk/projects/logic/ip/uart/sim/run/default/params.sim + /socgen/trunk/projects/logic/ip/uart/sim/run/divide/params.sim ~ /socgen/trunk/projects/logic/ip/usb_epp/rtl/xml/usb_epp.xml + /socgen/trunk/projects/logic/ip/usb_epp/sim/run/default/params.sim ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xml/vga_char_ctrl.xml ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xml/vga_char_ctrl_600x432.xml + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/params.sim + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/params.sim ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/xml/T6502.xml ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/inst_2_test/dut + /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/inst_2_test/params.sim ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/inst_2_test/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_irq_2/dut + /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_irq_2/params.sim ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_irq_2/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll_2/dut + /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll_2/params.sim ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll_2/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/irq_2_test/dut + /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/irq_2_test/params.sim ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/irq_2_test/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/kim_2/dut + /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/kim_2/params.sim ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/kim_2/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/tim_2/dut + /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/tim_2/params.sim ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/tim_2/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_irq_2/core.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll_2/core.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_irq_2_test/core.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_kim_2/core.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_tim_2/core.v ~ /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/xml/T6502_alu_logic.xml + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/params.sim ~ /socgen/trunk/projects/pic_micro/ip/mrisc/rtl/xml/mrisc.xml + /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/params.sim + /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/params.sim + /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/params.sim + /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/params.sim + /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/params.sim + /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/params.sim ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/xml/soc_mouse_mrisc.xml + /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/params.sim ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/core.v ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/core.v + /socgen/trunk/tools/bin/ver2xml ~ /socgen/trunk/tools/install/Fedora_13/Readme.txt ~ /socgen/trunk/tools/install/Ubuntu_10.4/Makefile ~ /socgen/trunk/tools/install/Ubuntu_10.10/Makefile jt_eaton Thu, 07 Oct 2010 02:30:06 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=65 added support for Fedora 13 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=64 <div>Rev 64 - jt_eaton (2 file(s) modified)</div><div>added support for Fedora 13</div>+ /socgen/trunk/tools/install/Fedora_13 + /socgen/trunk/tools/install/Fedora_13/Readme.txt jt_eaton Sun, 03 Oct 2010 03:52:40 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=64 added install config for Ubuntu 10.10 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=63 <div>Rev 63 - jt_eaton (3 file(s) modified)</div><div>added install config for Ubuntu 10.10</div>+ /socgen/trunk/tools/install/Ubuntu_10.10 + /socgen/trunk/tools/install/Ubuntu_10.10/Makefile + /socgen/trunk/tools/install/Ubuntu_10.10/README.txt jt_eaton Sat, 02 Oct 2010 21:11:36 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=63 fixed parameters from `defines http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=62 <div>Rev 62 - jt_eaton (1 file(s) modified)</div><div>fixed parameters from `defines</div>~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/verilog/top.v jt_eaton Wed, 29 Sep 2010 05:02:10 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=62 now generate dut files for coverage removed use of lndir http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=61 <div>Rev 61 - jt_eaton (36 file(s) modified)</div><div>now generate dut files for coverage removed use of lndir</div>~ /socgen/trunk/bench/verilog/TestBench.cov - /socgen/trunk/projects/logic/ip/disp_io/sim/cov/disp_io/dut - /socgen/trunk/projects/logic/ip/disp_io/sim/cov/disp_io/TB.defs - /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/cov/flash_memcontrl/dut - /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/cov/flash_memcontrl/TB.defs ~ /socgen/trunk/projects/logic/ip/io_module/rtl/xml/io_module.xml ~ /socgen/trunk/projects/logic/ip/io_module/rtl/xml/io_module_mouse.xml - /socgen/trunk/projects/logic/ip/io_module/sim/cov/io_module/dut - /socgen/trunk/projects/logic/ip/io_module/sim/cov/io_module/TB.defs - /socgen/trunk/projects/logic/ip/io_module/sim/cov/io_module_mouse/dut - /socgen/trunk/projects/logic/ip/io_module/sim/cov/io_module_mouse/TB.defs - /socgen/trunk/projects/logic/ip/ps2_interface/sim/cov/ps2_interface/dut - /socgen/trunk/projects/logic/ip/ps2_interface/sim/cov/ps2_interface/TB.defs - /socgen/trunk/projects/logic/ip/serial_rcvr/sim/cov/serial_rcvr/dut - /socgen/trunk/projects/logic/ip/serial_rcvr/sim/cov/serial_rcvr/TB.defs - /socgen/trunk/projects/logic/ip/uart/sim/cov/uart/dut - /socgen/trunk/projects/logic/ip/uart/sim/cov/uart/TB.defs - /socgen/trunk/projects/logic/ip/usb_epp/sim/cov/usb_epp/dut - /socgen/trunk/projects/logic/ip/usb_epp/sim/cov/usb_epp/TB.defs - /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl/dut - /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl/TB.defs - /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl_600x432/dut - /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl_600x432/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/xml/T6502.xml - /socgen/trunk/projects/Mos6502/ip/T6502/sim/cov/T6502/dut - /socgen/trunk/projects/Mos6502/ip/T6502/sim/cov/T6502/TB.defs ~ /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/xml/T6502_alu_logic.xml - /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/cov/T6502_alu_logic/dut - /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/cov/T6502_alu_logic/TB.defs - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/cov/mrisc/dut - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/cov/mrisc/TB.defs - /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/cov/soc_mouse/dut - /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/cov/soc_mouse/TB.defs - /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/cov/soc_mouse_mrisc/dut - /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/cov/soc_mouse_mrisc/TB.defs ~ /socgen/trunk/tools/bin/soc_link jt_eaton Wed, 29 Sep 2010 03:28:54 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=61 moved alu_logic into seperate component http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=60 <div>Rev 60 - jt_eaton (2 file(s) modified)</div><div>moved alu_logic into seperate component</div>- /socgen/trunk/projects/Mos6502/ip/T6502/sim/cov/T6502_alu_logic - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_logic_test jt_eaton Tue, 28 Sep 2010 16:14:11 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=60 added filelist.core to syn dirs to customize core http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=59 <div>Rev 59 - jt_eaton (11 file(s) modified)</div><div>added filelist.core to syn dirs to customize core</div>+ /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_irq_2/filelist.core + /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll_2/filelist.core + /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_irq_2_test/filelist.core + /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_kim_2/filelist.core + /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_tim_2/filelist.core + /socgen/trunk/projects/pic_micro/ip/mrisc/syn/Basys_loop/filelist.core ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/xml/soc_mouse_mrisc.xml + /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/filelist.core + /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/filelist.core ~ /socgen/trunk/tools/bin/Makefile.root ~ /socgen/trunk/tools/bin/soc_link jt_eaton Tue, 28 Sep 2010 16:12:09 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=59 removed old Makefiles http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=58 <div>Rev 58 - jt_eaton (6 file(s) modified)</div><div>removed old Makefiles</div>- /socgen/trunk/projects/logic/bin/Makefile - /socgen/trunk/projects/logic/bin/Makefile.root - /socgen/trunk/projects/Mos6502/bin/Makefile - /socgen/trunk/projects/Mos6502/bin/Makefile.root - /socgen/trunk/projects/pic_micro/bin/Makefile - /socgen/trunk/projects/pic_micro/bin/Makefile.root jt_eaton Tue, 28 Sep 2010 01:05:47 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=58 Now generate all filelists from xml files http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=57 <div>Rev 57 - jt_eaton (166 file(s) modified)</div><div>Now generate all filelists from xml files</div>~ /socgen/trunk/bench/verilog/TestBench ~ /socgen/trunk/bench/verilog/TestBench.cov ~ /socgen/trunk/Makefile ~ /socgen/trunk/projects/logic/ip/disp_io/rtl/variants/disp_io/defines.v ~ /socgen/trunk/projects/logic/ip/disp_io/rtl/xml/disp_io.xml - /socgen/trunk/projects/logic/ip/disp_io/sim/cov/disp_io/filelist - /socgen/trunk/projects/logic/ip/disp_io/sim/run/default/filelist - /socgen/trunk/projects/logic/ip/disp_io/sim/run/default/filelist.cov ~ /socgen/trunk/projects/logic/ip/flash_memcontrl/rtl/variants/flash_memcontrl/defines.v ~ /socgen/trunk/projects/logic/ip/flash_memcontrl/rtl/xml/flash_memcontrl.xml - /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/cov/flash_memcontrl/filelist - /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/run/default/filelist - /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/run/default/filelist.cov ~ /socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module/defines.v ~ /socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module_mouse/defines.v ~ /socgen/trunk/projects/logic/ip/io_module/rtl/xml/io_module.xml ~ /socgen/trunk/projects/logic/ip/io_module/rtl/xml/io_module_mouse.xml - /socgen/trunk/projects/logic/ip/io_module/sim/cov/io_module/filelist - /socgen/trunk/projects/logic/ip/io_module/sim/cov/io_module_mouse/filelist - /socgen/trunk/projects/logic/ip/io_module/sim/run/default/filelist - /socgen/trunk/projects/logic/ip/io_module/sim/run/default/filelist.cov - /socgen/trunk/projects/logic/ip/io_module/sim/run/mouse/filelist - /socgen/trunk/projects/logic/ip/io_module/sim/run/mouse/filelist.cov ~ /socgen/trunk/projects/logic/ip/ps2_interface/rtl/variants/ps2_interface/defines.v ~ /socgen/trunk/projects/logic/ip/ps2_interface/rtl/xml/ps2_interface.xml - /socgen/trunk/projects/logic/ip/ps2_interface/sim/cov/ps2_interface/filelist - /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/filelist - /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/filelist.cov - /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/mouse/filelist - /socgen/trunk/projects/logic/ip/ps2_interface/sim/run/mouse/filelist.cov ~ /socgen/trunk/projects/logic/ip/serial_rcvr/rtl/variants/serial_rcvr/defines.v ~ /socgen/trunk/projects/logic/ip/serial_rcvr/rtl/xml/serial_rcvr.xml - /socgen/trunk/projects/logic/ip/serial_rcvr/sim/cov/serial_rcvr/filelist - /socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/filelist - /socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/filelist.cov ~ /socgen/trunk/projects/logic/ip/uart/rtl/variants/uart/defines.v ~ /socgen/trunk/projects/logic/ip/uart/rtl/xml/uart.xml - /socgen/trunk/projects/logic/ip/uart/sim/cov/uart/filelist - /socgen/trunk/projects/logic/ip/uart/sim/run/default/filelist - /socgen/trunk/projects/logic/ip/uart/sim/run/default/filelist.cov - /socgen/trunk/projects/logic/ip/uart/sim/run/divide/filelist - /socgen/trunk/projects/logic/ip/uart/sim/run/divide/filelist.cov ~ /socgen/trunk/projects/logic/ip/usb_epp/rtl/variants/usb_epp/defines.v ~ /socgen/trunk/projects/logic/ip/usb_epp/rtl/xml/usb_epp.xml - /socgen/trunk/projects/logic/ip/usb_epp/sim/cov/usb_epp/filelist - /socgen/trunk/projects/logic/ip/usb_epp/sim/run/default/filelist - /socgen/trunk/projects/logic/ip/usb_epp/sim/run/default/filelist.cov ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/variants/vga_char_ctrl/defines.v ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/variants/vga_char_ctrl_600x432/defines.v ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xml/vga_char_ctrl.xml ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xml/vga_char_ctrl_600x432.xml - /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl/filelist + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl_600x432 + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl_600x432/dut + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl_600x432/Makefile + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl_600x432/TB.defs - /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/filelist - /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/filelist.cov + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432 + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/dmp_define + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/dut + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/liblist + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/Makefile + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/modellist + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/TB.defs + /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default_600x432/test_define ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/variants/T6502/defines.v - /socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/alu_logic.v ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/xml/T6502.xml - /socgen/trunk/projects/Mos6502/ip/T6502/sim/cov/T6502/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/cov/T6502_alu_logic/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_logic_test/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/inst_2_test/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/inst_2_test/filelist.cov - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_irq_2/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_irq_2/filelist.cov - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll_2/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll_2/filelist.cov - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/irq_2_test/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/irq_2_test/filelist.cov - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/kim_2/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/kim_2/filelist.cov ~ /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/kim_2/modellist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/tim_2/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/tim_2/filelist.cov - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_irq_2/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll_2/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_irq_2_test/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_kim_2/filelist - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_tim_2/filelist + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/bin + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/bin/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/copyright.v + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/geda + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/geda/drawing + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/geda/drawing/filelist + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/geda/drawing/sch + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/geda/drawing/sym + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/html + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/orig6502.txt + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/png + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/Readme.txt + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/spec.odt + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/T6502_doc.txt + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/doc/timing + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/variants + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/variants/T6502_alu_logic + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/variants/T6502_alu_logic/defines.v + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/verilog + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/verilog/top.v + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/xml + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/rtl/xml/T6502_alu_logic.xml + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/bin + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/bin/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/cov + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/cov/T6502_alu_logic + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/cov/T6502_alu_logic/dut + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/cov/T6502_alu_logic/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/cov/T6502_alu_logic/TB.defs + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/log + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/out + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/dmp_define + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/dut + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/liblist + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/Makefile + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/modellist + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/TB.defs + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/sim/run/alu_logic_test/test_define + /socgen/trunk/projects/Mos6502/ip/T6502_alu_logic/syn ~ /socgen/trunk/projects/pic_micro/ip/mrisc/rtl/variants/mrisc/defines.v ~ /socgen/trunk/projects/pic_micro/ip/mrisc/rtl/xml/mrisc.xml - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/cov/mrisc/filelist - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/filelist - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/filelist.cov - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/filelist - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/filelist.cov - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/filelist - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/filelist.cov - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/filelist - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/filelist.cov - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/filelist - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/filelist.cov - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/filelist - /socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/filelist.cov - /socgen/trunk/projects/pic_micro/ip/mrisc/syn/Basys_loop/filelist ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/variants/soc_mouse/defines.v ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/variants/soc_mouse_mrisc/defines.v ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/xml/soc_mouse_mrisc.xml - /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/cov/soc_mouse/filelist - /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/cov/soc_mouse_mrisc/filelist - /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/filelist - /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/filelist - /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/filelist + /socgen/trunk/targets/Basys/filelist + /socgen/trunk/targets/Basys/target.xml + /socgen/trunk/targets/Nexys2/filelist + /socgen/trunk/targets/Nexys2/target.xml ~ /socgen/trunk/tools/bin/Makefile.root ~ /socgen/trunk/tools/bin/soc_builder ~ /socgen/trunk/tools/bin/soc_link jt_eaton Tue, 28 Sep 2010 00:36:27 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=57 soc_builder now builds verilog from xml files http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=56 <div>Rev 56 - jt_eaton (19 file(s) modified)</div><div>soc_builder now builds verilog from xml files</div>+ /socgen/trunk/doc/pdf/guide_database.pdf ~ /socgen/trunk/doc/src/drawing/sch/data_fig1.sch ~ /socgen/trunk/doc/src/drawing/sch/data_fig2.sch + /socgen/trunk/doc/src/drawing/sch/data_fig3.sch ~ /socgen/trunk/doc/src/guides/guide_database.html ~ /socgen/trunk/doc/src/png/data_fig1.png + /socgen/trunk/doc/src/png/data_fig2.png ~ /socgen/trunk/Makefile ~ /socgen/trunk/projects/logic/bin/Makefile.root ~ /socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module/defines.v ~ /socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module_mouse/defines.v ~ /socgen/trunk/projects/logic/ip/io_module/rtl/xml/io_module.xml ~ /socgen/trunk/projects/Mos6502/bin/Makefile.root ~ /socgen/trunk/projects/pic_micro/bin/Makefile.root ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/xml/soc_mouse_mrisc.xml ~ /socgen/trunk/tools/bin/Makefile.root ~ /socgen/trunk/tools/bin/Makefile.root.x11 + /socgen/trunk/tools/bin/soc_builder ~ /socgen/trunk/tools/bin/soc_link jt_eaton Wed, 22 Sep 2010 16:07:41 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=56 removed pre-rout and gates sims http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=55 <div>Rev 55 - jt_eaton (14 file(s) modified)</div><div>removed pre-rout and gates sims</div>- /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_irq_2/gate_sims - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_irq_2/sim - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll_2/gate_sims - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll_2/sim - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_irq_2_test/gate_sims - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_irq_2_test/sim - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_kim_2/gate_sims - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_kim_2/sim - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_tim_2/gate_sims - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_tim_2/sim - /socgen/trunk/projects/pic_micro/ip/mrisc/syn/Basys_loop/gate_sims - /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/gate_sims - /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/gate_sims - /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/sim jt_eaton Sun, 19 Sep 2010 19:59:50 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=55 now set up fpga targets from xml files http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=54 <div>Rev 54 - jt_eaton (26 file(s) modified)</div><div>now set up fpga targets from xml files</div>~ /socgen/trunk/doc/src/guides/guide_database.html ~ /socgen/trunk/Makefile ~ /socgen/trunk/projects/logic/ip/disp_io/sim/cov/disp_io/dut + /socgen/trunk/projects/logic/ip/disp_io/sim/cov/disp_io/Makefile ~ /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/cov/flash_memcontrl/dut + /socgen/trunk/projects/logic/ip/flash_memcontrl/sim/cov/flash_memcontrl/Makefile + /socgen/trunk/projects/logic/ip/io_module/sim/cov/io_module/Makefile + /socgen/trunk/projects/logic/ip/io_module/sim/cov/io_module_mouse/Makefile ~ /socgen/trunk/projects/logic/ip/ps2_interface/sim/cov/ps2_interface/Makefile + /socgen/trunk/projects/logic/ip/serial_rcvr/sim/cov/serial_rcvr/Makefile ~ /socgen/trunk/projects/logic/ip/uart/sim/cov/uart/Makefile ~ /socgen/trunk/projects/logic/ip/usb_epp/sim/cov/usb_epp/dut + /socgen/trunk/projects/logic/ip/usb_epp/sim/cov/usb_epp/Makefile ~ /socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/cov/vga_char_ctrl/Makefile ~ /socgen/trunk/projects/Mos6502/ip/T6502/rtl/xml/T6502.xml - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_irq_2/target - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll_2/target - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_irq_2_test/target - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_kim_2/target - /socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_tim_2/target ~ /socgen/trunk/projects/pic_micro/ip/mrisc/rtl/xml/mrisc.xml - /socgen/trunk/projects/pic_micro/ip/mrisc/syn/Basys_loop/target ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/xml/soc_mouse_mrisc.xml - /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/target - /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/target ~ /socgen/trunk/tools/bin/soc_link jt_eaton Sun, 19 Sep 2010 18:50:41 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=54 fixed check_fpgas http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=53 <div>Rev 53 - jt_eaton (1 file(s) modified)</div><div>fixed check_fpgas</div>~ /socgen/trunk/Makefile jt_eaton Fri, 17 Sep 2010 05:28:51 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=53 removed noworking sims and syn http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=52 <div>Rev 52 - jt_eaton (2 file(s) modified)</div><div>removed noworking sims and syn</div>- /socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse - /socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse jt_eaton Fri, 17 Sep 2010 04:44:44 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=52 removed old test http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=51 <div>Rev 51 - jt_eaton (1 file(s) modified)</div><div>removed old test</div>- /socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test jt_eaton Fri, 17 Sep 2010 04:41:33 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=51 clean up from last checkin http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=50 <div>Rev 50 - jt_eaton (5 file(s) modified)</div><div>clean up from last checkin</div>- /socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/alu_ctrl.v - /socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/core.v - /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/xml/soc_mouse.xml ~ /socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/xml/soc_mouse_mrisc.xml ~ /socgen/trunk/tools/bin/soc_link jt_eaton Fri, 17 Sep 2010 04:07:26 +0100 http://opencores.org/websvn,revision?repname=socgen&path=%2Fsocgen%2Ftrunk%2F&rev=50

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