IR Entity Reference
List of all members.
Architectures |
behave | Architecture |
Libraries |
ieee | |
Packages |
std_logic_1164 | |
Ports |
clk | in |
| Rising edge clock.
|
clr | in |
| Active high asynchronous clear.
|
li | in |
| Active low load instruction into IR.
|
ei | in |
| Active low enable IR output.
|
d | in ( 7 downto 0 ) |
| IR 8-bit input data word from W-bus.
|
q_w | out ( 3 downto 0 ) |
| IR 4-bit output data word to W-bus.
|
q_c | out ( 3 downto 0 ) |
| IR 4-bit output control word to Control-Sequencer block.
|
The documentation for this class was generated from the following file: