The JTAG data registers for the ORPSoC Debug Unit in dbg_top.v appear to be 1 bit too wide. The effect is that on writing a register there is a dead bit at the top and on reading the CRC is shifted 1 bit up.
I can't see that there is any good reason for this. The always block setting the data registers should be changed from
always @ (posedge TCK or posedge trst) begin if(trst) JTAG_DR_IN`DR_LENGTH-1:0<=#Tp 0; else if(IDCODESelected) // To save space JTAG_DR_IN is also used for shifting out IDCODE begin if(ShiftDR) JTAG_DR_IN31:0 <= #Tp {TDI, JTAG_DR_IN31:1}; else JTAG_DR_IN31:0 <= #Tp `IDCODE_VALUE; end else if(CHAIN_SELECTSelected & ShiftDR) JTAG_DR_IN12:0 <= #Tp {TDI, JTAG_DR_IN12:1}; else if(DEBUGSelected & ShiftDR) begin if(RiscDebugScanChain | WishboneScanChain) JTAG_DR_IN73:0 <= #Tp {TDI, JTAG_DR_IN73:1}; else if(RegisterScanChain) JTAG_DR_IN46:0 <= #Tp {TDI, JTAG_DR_IN46:1}; end end
to
always @ (posedge TCK or posedge trst) begin if(trst) JTAG_DR_IN`DR_LENGTH-1:0<=#Tp 0; else if(IDCODESelected) // To save space JTAG_DR_IN is also used for shifting out IDCODE begin if(ShiftDR) JTAG_DR_IN31:0 <= #Tp {TDI, JTAG_DR_IN31:1}; else JTAG_DR_IN31:0 <= #Tp `IDCODE_VALUE; end else if(CHAIN_SELECTSelected & ShiftDR) JTAG_DR_IN11:0 <= #Tp {TDI, JTAG_DR_IN11:1}; // JPB: width fixed else if(DEBUGSelected & ShiftDR) begin if(RiscDebugScanChain | WishboneScanChain) JTAG_DR_IN72:0 <= #Tp {TDI, JTAG_DR_IN72:1}; // JPB: width fixed else if(RegisterScanChain) JTAG_DR_IN45:0 <= #Tp {TDI, JTAG_DR_IN45:1}; // JPB: width fixed end end
The computation of send_crc should be changed from:
assign send_crc = select_crc_out? {9{BypassRegister}} : // Calculated CRC is returned when read operation is {CalculatedCrcOut, 1'b0} ; // performed, else received crc is returned (loopback).
to
assign send_crc = select_crc_out? {9{BypassRegister}} : // Calculated CRC is returned when read operation is // {CalculatedCrcOut, 1'b0} ; // performed, else received crc is returned (loopback). {1'b0, CalculatedCrcOut} ; // JPB fix
I haven't committed these, since they should be reviewed. I'm not really a HW engineer and I don't have a board on which to test this properly.