The current code, listed below, // rd_info_pointer always @ (posedge clk or posedge rst) begin if (rst) rd_info_pointer <= 6'h0; else if (release_buffer & (~info_full)) rd_info_pointer <=#Tp rd_info_pointer + 1'b1; end
should be:
// rd_info_pointer always @ (posedge clk or posedge rst) begin if (rst) rd_info_pointer <= 6'h0; else if (release_buffer & (~info_empty)) rd_info_pointer <=#Tp rd_info_pointer + 1'b1; end
i.e. increment rd_info_pointer if release_buffer and info_fifo is not empty instead of the current logic that increments only if fifo is not full.
This solution solved a problem we were seeing....it really should be added to the design if at all possible!!!
Ed,
do you use this core in a "real world". I'm looking for a CAN IP. Does this core is stable ?
Please help.
Regards.
I downloaded this core and try to program it on a Cyclone device. Quartus warned that altdpram does not support Cyclone families. And this core didn't work.
I wanna know why this core didn't work? Because I should change another Chip of altera? Or could I do some fix job, to work it out ?
I'm not speaking English. So maybe my expression looks strange.
Waiting for answers, and thank you very much.
you are right,this is a bug! i use the CAN core is wrong at the begin of comminution, it become right after about 20 seconds. when modify according to your advise ,the CAN CORE is right completely! thank you very much!
you are right,this is a bug! i use the CAN core is wrong at the begin of comminution, it become right after about 20 seconds. when modify according to your advise ,the CAN CORE is right completely! thank you very much!
I was adding some improvements to the code when i found this bug, already figured out the fix on my own(Same fix as in this post)
This fix should really be pushed in to the main branch.