The idea is the following:
-- this is the official thread related to
http://opencores.com/project,uart_fpga_slow_control,Overview
-- the link to this thread appears in the main project description

All issues related to the project: specific questions, comments, feedback, etc.
should be posted as a reply to this post.

Double advantage:
-- users:
* find a clear place where to ask questions of public relevance
related to a specific project (besides private email exchange, and bug report)
e.g: "hey where can I modifiy the number of stop bits?"
"anybody willing to implement a mind reader based on this code?"
* share experiance with the whole community on a specific project
e.g: "wow I found this code so buggy I don't now what to do with it!"
-- developers:
* watch for questions in a single place
e.g:"thanks Jimi, we will implement the string reversal in the next release"
e.g:"thanks Eddie, we will tap registers"
* follow own project related discussions
e.g:"cool somebody is planning to improve the code!"

due to lack of time of the maintainers other threads in the forum will,
concerning this project, be hardly followed.

have fun.

P.S: to improve the quality of the forum RSS feedback would be much appreciated!

hey people check out the latest code updates!

Hey people,

We are having timid but encouraging download statistics and private feedback.
But please do us a great favor: give us public tangible feedback!

* what are you using the core for?
* is it useful? or not running at all?
* things that you liked and did not about it?
* is documentation sufficient and of any use?

Feedback is good for designers: it challenges improvements, sharing of ideas, and increase satisfaction. And it is rewarding, even if negative!

Open source designers are ready to share, so why would users who benefit from this, restrain comments, critics or compliments?

Bare in mind that feedback is fundamental to prove the relevance and impact on people and society of open source projects promoted by public institutions. And there are quite a few people with this concern!

A designer should shift gear and unleash his will for sharing.
Users should learn how crucial feedback is.

This simple idea can boost this community a lot.

Think about it and help us!

Thanks!

HI can anyone help me to customize the input and output of top module to be as same as IO in pc16550 IC. Since i m not familiar with VHDL kindly help me out. Thank you

Hello Sakthyvel,

The idea behind the fpga_slow_control core is to wrap the PC16550 core in a way that it can handle simple register maps in a more "friendly" way.

If you need the bare PC16550 I recommend having a look at the original project by LeFevre http://opencores.org/project,a_vhd_16550_uart. I know that works fine.

But there are also other UART projects around the site. You can check, I believe seeing even a Verilog one.

Please let me know if I can help you otherwise.

Cheers,
Andrea

Hi,

writing to the registers seems to work as it is dicribed. I can set on the LEDs as I want etc. But when I use the update command (80 00 00 00 00 00 00) I always receive the reserved sync register (00 01 00 00 00 00) and nothing else. This is independend of the iformation stored in my registers. Have i made any mistakes or do you have any idea what the problem is?

Thanks in advance,
Rakna

Hey Rakna,

Your problem had been tackled during our email exchange.
But for the sake of documenting it I also answer your question here:

If you use the UART at a baudrate slower than 912600 you should then change the value of the v_count which is timing the data transfer of the 6 Bytes FPGA registers to the UART core.

Thank you for finding this undocumented feature! :)