OpenCores

LPC ROM, SPI ROM, 8bit ROM emulator on Artec Dongle II board

Description

Project to create generic emulator/debugger/analyzer with
on-the-fly reprogrammable firmware on Artec Dongle II board (containing Altera Cyclone III, Flash 32MB, PSRAM 32MB (UltraCap for image retention), FTDI usb, 32 GPIO pins, 4 segment LED, 8 green LEDs, 1 green/red LED, 8 pins for LPC/SPI bus, 6 pin extension header, EPROM 1024 bytes).

PS. The Artec Dongle II is not yet available for sale

Status

DONE

- code transfer from Dongle I
- PSRAM support added to memory interface and USB interface (4MB write time is 4 sec under Linux read is 10 sec)
- New jumper block with LED indicators
- dongle.py updated for initial features
- dev_present signal switching from PC by default is low (has strong pull down 330 ohm for backward compatibility)
- removed the need for reset after programming to free memory bus lock (lock is now controlled by the dongle.py software)

TODO

- SPI boot support (firmware)
- 8 bit parallel ROM support code (firmware)
- write GPIO support (firmware) and supporting Python module (software)
- boot trace feature (save all accessed addresses and data and send to PC) (firmware)
- write new update.py to work trough FTDI D2xx bit bang feature (software)
- write 16 bit to 8 bit FIFO bridge to further speed up USB transfer on PSRAM regions (firmware)
- try to rewrite Uspp read() in linux implementation to support more than word read at a time from OS (software)
- write EPORM support code (firmware)
- write software jumper support with settings stored/restored from EPROM (firmware)
- write or port Analyzer code (firmware)



IMAGE: thumb_Dongle_II_board_small.JPG

FILE: thumb_Dongle_II_board_small.JPG
DESCRIPTION: board image