OpenCores
This page contains files uploaded to the old opencores website as well as images and documents intended for use on other pages in this project. If you want to download this project or browse its svn, you can do so at the overview-page.
DateFileDescription
2003-08-22 13:39cf_fft.tgzVerilog, VHDL, C, and Python generated from Confluence 0.6.3.
2003-03-28 18:40cf_fft_test_large.tgzVerilog and C testbench for cf_fft_1024_16. Simulation runs for 100000 cycles.
2003-03-23 23:51cf_fft_test.tgzVerilog and C testbench for cf_fft_8_8. Both generate VCD waveform files.