AHB DMA 32 / 64 bits
Project maintainers
Details
Name: dma_ahb
Created: Mar 25, 2011
Updated: Jun 25, 2013
SVN Updated: Apr 3, 2011
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 0 solved
Created: Mar 25, 2011
Updated: Jun 25, 2013
SVN Updated: Apr 3, 2011
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 0 solved
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Other project properties
Category:System on Chip
Language:Verilog
Development status:Mature
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Language:Verilog
Development status:Mature
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
Single channel 32 or 64 bit AHB master DMA core. Supports simultaneous read and write, command lists, peripheral control, timeouts and endianess swapping. Based on Provartec PR201 http://www.provartec.comipproducts
Related projects
Generic AHB matrix
http://opencores.orgproject,robust_ahb_matrix
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