PCIe_DS_DMA

Description

The PCIe_DS_DMA core provides PCI Express controller for Xilinx HARD core for Virtex5, Virtex6, Spartan6, Artix 7 FPGA.

Main features

• PCI Express 1.1 x1,x4,x8 or 2.0 x4
• two address space: BAR0, BAR1
• access to registers can only be single 32-bit instructions
• local bus: 64 bit, 250 MHz
• two independent bidirectional DMA channel
• DMA channel only works in the SCATTER-GATHER mode
• The minimum unit of data for channel DMA - 4 kB
• Descriptors combined into the block descriptors. The maximum number of descriptors in the block - 63
• DMA channel uses 40 bit addresses

Resource

The main site of project: http://ds-dev.ru/projects/ds-dma

English Wiki: http://ds-dev.ru/projects/ds-dma/wiki/English

Russian Wiki: http://ds-dev.ru/projects/ds-dma/wiki

Struct of repository

• core - common code
• ds_dma64\pcie_src - pci express controller
• adm - common files to ADM projects
• wishbone - commons files to WISHBONE projects
• projects - projects for several boards
• soft\linux - Software for Linux
  • common - common code
  • application - test application
  • driver\pex_drv - driver for linux core
  • exam - simple examples

ADM projects

ADM is internal inteface of Instrumental Systems company: http://www.insys.ru

• ambpex5_v20_sx50t_core - example project for AMBPEX5 board.
• ml605_lx240t_core - example project for ML605 board.
• sp605_lx45t_core - example project for SP605 board.
• ac701_a200t_core - example project for AC701 board.

WISHBONE projects

• sp605_lx45t_wishbone - example project for SP605 board.
• ambpex5_sx50t_wishbone - example project for AMBPEX5 board.

Main components

PCI Express controller with PLD_Bus

PLD_Bus is an internal packet bus of DS_DMA controller. PLD_Bus can be transform to another bus as LC_BUS, Wishbone, AXI, etc. There are four main components:

• pcie_core64_m1 - PCI Express controller for Virtex 5
• pcie_core64_m4 - PCI Express controller for Virtex 6
• pcie_core64_m6 - PCI Express controller for Spartan 6
• pcie_core64_m10 - PCI Express controller for Artix 7

PCI Express controller with LC_Bus

LC_Bus is a generic parallel bus. The bus contains 32-bit addres bus, 64-bit data bus and several contol signals. Components:

• pcie_core64_m2 - PCI Express controller for Virtex 5
• pcie_core64_m5 - PCI Express controller for Virtex 6 or Artix 7
• pcie_core64_m7 - PCI Express controller for Spartan 6

PCI Express controller with Wishbone bus

Components:

• pcie_core64_wishbone - PCI Express controller for Spartan 6
• pcie_core64_wishbone_m8 - PCI Express controller for Virtex 5

Results

Speed of data transfer for PCI Express v1.1 x8 : http://ds-dev.ru/projects/ds-dma/wiki/Ambpex5_v20_sx50t_core_res_en

Download

Download page: http://ds-dev.ru/projects/ds-dma/wiki/Download

Contact

Dmitry Smekhov

• E-mail: dsmv@mail.ru
• LinkedIn: http://www.linkedin.com/pub/dmitry-smekhov/1a/b15/607

Igor Kazinov

• E-mail: igor.kazinov@gmail.com
• LinkedIn: http://ua.linkedin.com/pub/igor-kazinov/21/432/792

Vladimir Karakozov

• E-mail: karakozov@gmail.com