OpenCores
News
Oct 16, 2016whetsonte score updateRissetto, Jose
Oct 15, 2016upgrade with several board support and faster 30k dhrystone cpu versionRissetto, Jose
Jul 25, 2016UPDATED FROM NEXYS4 16MB PSRAM BOARD TO NEXYS4 DDR 128MB SDRAM BOARDRissetto, Jose
May 25, 2016update for AXI4Rissetto, Jose
Feb 3, 2016fix textRissetto, Jose
Feb 2, 2016Added AXI IP for Vivado , the core is not the same is has AXI interface and no caches.Rissetto, Jose
Aug 13, 2015upgraded perfs to 11.78 DMIPSRissetto, Jose
Jul 15, 2015increased dhrystone to 17000Rissetto, Jose
Jul 4, 2015typoRissetto, Jose
Jul 4, 2015update whetstone scoreRissetto, Jose
Jul 3, 2015updated rtl & info v10Rissetto, Jose
May 31, 2015links for google plus addedRissetto, Jose
May 7, 2015update descriptionRissetto, Jose
May 7, 2015update few notesRissetto, Jose
May 7, 2015updated with more common 32 bits wishbone interfaceRissetto, Jose
Feb 10, 201575MHZ upgraded , 4kB datacache addedRissetto, Jose
Jan 21, 2015youtube videos link addedRissetto, Jose
Jan 20, 2015whishcone compliantRissetto, Jose
Jan 20, 2015update descriptionRissetto, Jose
Dec 14, 2014update fill 33% of artix7Rissetto, Jose
Dec 14, 2014errata baud 115200Rissetto, Jose
Dec 1, 2014update support mailRissetto, Jose
Nov 18, 2014fixed description detailsRissetto, Jose
Nov 15, 2014Added IT87 gpios , compatible with linux driver for IT87 chipsRissetto, Jose
Nov 15, 2014updated uart to 16750Rissetto, Jose
Oct 22, 2014fix descrption on fault #6 -> #7Rissetto, Jose
Oct 15, 2014added support emailRissetto, Jose
Oct 15, 2014Switch configuration noticeRissetto, Jose
Oct 13, 2014updates links sectionRissetto, Jose
Oct 13, 2014update DescriptionRissetto, Jose
Oct 13, 2014Description addedRissetto, Jose