OpenCores

Wishbone Register Bank Intercon Multi-master Multi-slave

News
Jul 27, 2014New graphic and expand project page information.Walker, Barry
Jul 26, 2014Updating project description.Walker, Barry
Jul 18, 2014Sorry the entire project isn't polished. Still a work in process. I think there is value in the posted code, but the test bench and implementation files are still a bit of a mess. I gave up on the Aldec simulation approach and am reworking with GHDL. I think it will produce much a much better project.Walker, Barry
Jul 9, 2014It occurs to me that the test bench should be written in a manner similar to the controller so it would test custom packages right along with the controller. Let me know if you are a test bench wizard interested in helping.Walker, Barry
Jul 7, 2014Committed new versions of all the code and added an example project and simple test bench. Files all synthesize and simulate.Walker, Barry
Jul 6, 2014Just downloading the initial files. Not enough to be useful yet, but a start. Spent the afternoon composing a manual to describe operation and goals.Walker, Barry