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soc-nes :: Overview

Details

Name: house-nes
Created: Jul 2, 2018
Updated: Jul 2, 2018
SVN: No files checked in
Bugs: reported / solved

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Other project properties

Category: System on Chip
Language: Verilog & VHDL
Development status: Planning
Additional info: none
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

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