OpenCores

mips compatible barrel processor

Project maintainers

Details

Name: octagon
Created: Jul 13, 2015
Updated: Jul 13, 2015
SVN: Check description below for external links
Bugs: 0 reported / 0 solved
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Other project properties

Category:Processor
Language:VHDL
Development status:Beta
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

Octagon is a 32-bit mostly mips compatible 8-thread barrel processor. It is designed for LUT-6 architectures with LUT-ram and LUT-shift registers. It can reach speads in excess of 200mhz in Spartan-6.

Some compiler settings are required to generate code compatible with Octagon. These are detailed in the example program. Mostly this results from lack of a branch delay slot. Supervisory instructions have different bits here and there and need to be watched out for when writing low-level codes.

Current work is being done on adding MMU support so that the core will be able to run linux.

Getting the code

Code is available on GitHub at https://github.com/jonpryoctagon