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*UART to Bus :: News

News

Feb 25, 2012 Updated block diagram to include the bus request/grant signals.
Feb 17, 2012 Chaged license to BSD
Nov 16, 2011 Updated overview page
Apr 15, 2011 Added Lattice synthesys results, many thanks to Paul V. Shatov
Aug 4, 2010 Updated project language to Verilog & VHDL
Jul 18, 2010 VHDL version now available
Jul 7, 2010 VHDL version coming soon
Jul 5, 2010 Updating core overview
Jul 5, 2010 Updating project overview
Apr 12, 2010 Updated additional info in the project page
Apr 3, 2010 Another try in updating project info
Apr 3, 2010 Updated additional info in the project page
Apr 2, 2010 Corrected problems with the test bench. Updated documentation.
Feb 27, 2010 Update project status to done.
Feb 15, 2010 Files uploaded to SVN server.
Feb 12, 2010 Updated description of project. Coming soon.
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