OpenCores
Written in: Stage: License: Wishbone version:

marked with *

Arithmetic core 2

Communication controller 4

Crypto core 1

Project Files Statistics Status License Wishbone version
fast AES-128 Encryption only cores Yes Stats Others

ECC core 1

Project Files Statistics Status License Wishbone version
Ultimate CRC Yes Stats GPL

Library 1

Project Files Statistics Status License Wishbone version
Srdy-Drdy Library Yes Stats Others

Other 1

Project Files Statistics Status License Wishbone version
Adjustable Frequency Divider Yes Stats LGPL

Processor 6

Project Files Statistics Status License Wishbone version
8-bit uP Yes Stats GPL
HF-RISC Yes Stats GPL
MB-Lite Yes Stats Wbc LGPL
* openMSP430 Yes Stats OCCP BSD
* OpenRISC 1000 Yes Stats Wbc OCCP Has external files LGPL
TV80 Yes Stats BSD

System on Chip 1

Project Files Statistics Status License Wishbone version
Async-SDM-NoC Yes Stats LGPL

Testing / Verification 2

Project Files Statistics Status License Wishbone version
The VHDL Test Bench Yes Stats BSD
Uart2BusTestBench Yes Stats LGPL

Video controller 2

Project Files Statistics Status License Wishbone version
H.264/AVC Baseline Decoder Yes Stats
* VGA/LCD Controller Yes Stats Wbc OCCP GPL
© copyright 1999-2018 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.