URL https://opencores.org/ocsvn/8051/8051/trunk

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[/] [8051/] [trunk/] [bench/] [in/] [fib.in] - Blame information for rev 186

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Line No.	Rev	Author	Line
1	96	simont	`///`
2			`/// created by oc8051 rom maker`
3			`/// author: Simon Teran (simont@opencores.org)`
4			`///`
5			`/// source file: D:\verilog\oc8051\test\fib.hex`
6			`/// date: 19.6.02`
7			`/// time: 10:14:54`
8			`///`
9			`02`
10			`00`
11			`C2`
12			`8B`
13			`12`
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306			`E9`
307			`25`
308			`82`
309			`C8`
310			`F2`
311			`22`

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[/] [8051/] [trunk/] [bench/] [in/] [fib.in] - Blame information for rev 186