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[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_decoder.v] - Blame information for rev 10

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1 10 markom
////////////////////////////////////////////////////////////////////// ////                                                              ////
2 2 simont
////  8051 core decoder                                           ////
3
////                                                              ////
4
////  This file is part of the 8051 cores project                 ////
5
////  http://www.opencores.org/cores/8051/                        ////
6
////                                                              ////
7
////  Description                                                 ////
8
////   Main 8051 core module. decodes instruction and creates     ////
9
////   control sigals.                                            ////
10
////                                                              ////
11
////  To Do:                                                      ////
12 8 markom
////   optimize state machine, especially IDS ASS and AS3         ////
13 2 simont
////                                                              ////
14
////  Author(s):                                                  ////
15
////      - Simon Teran, simont@opencores.org                     ////
16
////                                                              ////
17
//////////////////////////////////////////////////////////////////////
18
////                                                              ////
19
//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
20
////                                                              ////
21
//// This source file may be used and distributed without         ////
22
//// restriction provided that this copyright statement is not    ////
23
//// removed from the file and that any derivative work contains  ////
24
//// the original copyright notice and the associated disclaimer. ////
25
////                                                              ////
26
//// This source file is free software; you can redistribute it   ////
27
//// and/or modify it under the terms of the GNU Lesser General   ////
28
//// Public License as published by the Free Software Foundation; ////
29
//// either version 2.1 of the License, or (at your option) any   ////
30
//// later version.                                               ////
31
////                                                              ////
32
//// This source is distributed in the hope that it will be       ////
33
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
34
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
35
//// PURPOSE.  See the GNU Lesser General Public License for more ////
36
//// details.                                                     ////
37
////                                                              ////
38
//// You should have received a copy of the GNU Lesser General    ////
39
//// Public License along with this source; if not, download it   ////
40
//// from http://www.opencores.org/lgpl.shtml                     ////
41
////                                                              ////
42
//////////////////////////////////////////////////////////////////////
43
//
44
// ver: 1
45
//
46
 
47
// synopsys translate_off
48
`include "oc8051_timescale.v"
49
// synopsys translate_on
50
 
51
`include "oc8051_defines.v"
52
 
53
 
54
 
55
module oc8051_decoder (clk, rst, op_in, eq, ram_rd_sel, ram_wr_sel, bit_addr,
56
wr, src_sel1, src_sel2, src_sel3, alu_op, psw_set, cy_sel, imm_sel, pc_wr,
57
pc_sel, comp_sel, rom_addr_sel, ext_addr_sel, wad2, rd, write_x, reti,
58
rmw);
59
//
60
// clk          (in)  clock
61
// rst          (in)  reset
62
// op_in        (in)  operation code [oc8051_op_select.op1]
63
// eq           (in)  compare result [oc8051_comp.eq]
64
// ram_rd_sel   (out) select, whitch address will be send to ram for read [oc8051_ram_rd_sel.sel, oc8051_sp.ram_rd_sel]
65
// ram_wr_sel   (out) select, whitch address will be send to ram for write [oc8051_ram_wr_sel.sel -r, oc8051_sp.ram_wr_sel -r]
66
// wr           (out) write - if 1 then we will write to ram [oc8051_ram_top.wr -r, oc8051_acc.wr -r, oc8051_b_register.wr -r, oc8051_sp.wr-r, oc8051_dptr.wr -r, oc8051_psw.wr -r, oc8051_indi_addr.wr -r, oc8051_ports.wr -r]
67
// src_sel1     (out) select alu source 1 [oc8051_alu_src1_sel.sel -r]
68
// src_sel2     (out) select alu source 2 [oc8051_alu_src2_sel.sel -r]
69
// src_sel3     (out) select alu source 3 [oc8051_alu_src3_sel.sel -r]
70
// alu_op       (out) alu operation [oc8051_alu.op_code -r]
71
// psw_set      (out) will we remember cy, ac, ov from alu [oc8051_psw.set -r]
72
// cy_sel       (out) carry in alu select [oc8051_cy_select.cy_sel -r]
73
// comp_sel     (out) compare source select [oc8051_comp.sel]
74
// bit_addr     (out) if instruction is bit addresable [oc8051_ram_top.bit_addr -r, oc8051_acc.wr_bit -r, oc8051_b_register.wr_bit-r, oc8051_sp.wr_bit -r, oc8051_dptr.wr_bit -r, oc8051_psw.wr_bit -r, oc8051_indi_addr.wr_bit -r, oc8051_ports.wr_bit -r]
75
// wad2         (out) write acc from destination 2 [oc8051_acc.wad2 -r]
76
// imm_sel      (out) immediate select [oc8051_immediate_sel.sel -r]
77
// pc_wr        (out) pc write [oc8051_pc.wr]
78
// pc_sel       (out) pc select [oc8051_pc.pc_wr_sel]
79
// rom_addr_sel (out) rom address select (alu destination or pc) [oc8051_rom_addr_sel.select]
80
// ext_addr_sel (out) external address select (dptr or Ri) [oc8051_ext_addr_sel.select]
81
// rd           (out) read from rom [oc8051_pc.rd, oc8051_op_select.rd]
82
// write_x      (out) write to external rom [pin]
83
// reti         (out) return from interrupt [pin]
84
// rmw          (out) read modify write feature [oc8051_ports.rmw]
85
//
86
 
87
input clk, rst, eq;
88
input [7:0] op_in;
89
 
90
output wr, reti, write_x, bit_addr, src_sel3, rom_addr_sel, ext_addr_sel,
91
pc_wr, wad2, rmw;
92
output [1:0] ram_rd_sel, src_sel1, src_sel2, psw_set, cy_sel, pc_sel;
93
output [2:0] ram_wr_sel, comp_sel, imm_sel;
94
output [3:0] alu_op;
95
output rd;
96
 
97
reg reti, write_x, rmw;
98
reg wr,  bit_addr, src_sel3, rom_addr_sel, ext_addr_sel, pc_wr, wad2;
99 9 markom
reg [1:0] comp_sel, psw_set, ram_rd_sel, src_sel1, src_sel2, pc_sel, cy_sel;
100 2 simont
reg [3:0] alu_op;
101 9 markom
reg [2:0] ram_wr_sel, imm_sel;
102 2 simont
 
103
//
104
// state        if 2'b00 then normal execution, sle instructin that need more than one clock
105
// op           instruction buffer
106
reg [1:0] state;
107
reg [7:0] op;
108
 
109
//
110
// if state = 2'b00 then read nex instruction
111
assign rd = !state[0] & !state[1];
112
 
113
//
114
// main block
115
// case of instruction set control signals
116 5 markom
always @(op_in or eq or state or op)
117 2 simont
begin
118
    case (state)
119
      2'b01: begin
120
    casex (op)
121
      `OC8051_ACALL :begin
122
          ram_rd_sel = `OC8051_RRS_DC;
123
          ram_wr_sel = `OC8051_RWS_SP;
124
          src_sel1 = `OC8051_ASS_IMM;
125
          src_sel2 = `OC8051_ASS_DC;
126
          alu_op = `OC8051_ALU_NOP;
127
          imm_sel = `OC8051_IDS_PCH;
128
          wr = 1'b1;
129
          psw_set = `OC8051_PS_NOT;
130
          cy_sel = `OC8051_CY_0;
131
          pc_wr = `OC8051_PCW_N;
132
          pc_sel = `OC8051_PIS_DC;
133
          comp_sel = `OC8051_CSS_DC;
134
          src_sel3 = `OC8051_AS3_DC;
135
          comp_sel = `OC8051_CSS_DC;
136
          rmw = `OC8051_RMW_N;
137
          bit_addr = 1'b0;
138
          wad2 = `OC8051_WAD_N;
139
          rom_addr_sel = `OC8051_RAS_PC;
140
          ext_addr_sel = `OC8051_EAS_DC;
141
 
142
        end
143
      `OC8051_AJMP : begin
144
          ram_rd_sel = `OC8051_RRS_DC;
145
          ram_wr_sel = `OC8051_RWS_DC;
146
          src_sel1 = `OC8051_ASS_DC;
147
          src_sel2 = `OC8051_ASS_DC;
148
          alu_op = `OC8051_ALU_NOP;
149
          imm_sel = `OC8051_IDS_DC;
150
          wr = 1'b0;
151
          psw_set = `OC8051_PS_NOT;
152
          cy_sel = `OC8051_CY_0;
153
          pc_wr = `OC8051_PCW_N;
154
          pc_sel = `OC8051_PIS_DC;
155
          comp_sel = `OC8051_CSS_DC;
156
          src_sel3 = `OC8051_AS3_DC;
157
          comp_sel = `OC8051_CSS_DC;
158
          rmw = `OC8051_RMW_N;
159
          bit_addr = 1'b0;
160
          wad2 = `OC8051_WAD_N;
161
          rom_addr_sel = `OC8051_RAS_PC;
162
          ext_addr_sel = `OC8051_EAS_DC;
163
 
164
        end
165
      `OC8051_LCALL :begin
166
          ram_rd_sel = `OC8051_RRS_DC;
167
          ram_wr_sel = `OC8051_RWS_SP;
168
          src_sel1 = `OC8051_ASS_IMM;
169
          src_sel2 = `OC8051_ASS_DC;
170
          alu_op = `OC8051_ALU_NOP;
171
          imm_sel = `OC8051_IDS_PCH;
172
          wr = 1'b1;
173
          psw_set = `OC8051_PS_NOT;
174
          cy_sel = `OC8051_CY_0;
175
          pc_wr = `OC8051_PCW_N;
176
          pc_sel = `OC8051_PIS_DC;
177
          comp_sel = `OC8051_CSS_DC;
178
          src_sel3 = `OC8051_AS3_DC;
179
          comp_sel = `OC8051_CSS_DC;
180
          rmw = `OC8051_RMW_N;
181
          bit_addr = 1'b0;
182
          wad2 = `OC8051_WAD_N;
183
          rom_addr_sel = `OC8051_RAS_PC;
184
          ext_addr_sel = `OC8051_EAS_DC;
185
 
186
        end
187
      `OC8051_MOVC_DP :begin
188
          ram_rd_sel = `OC8051_RRS_DC;
189
          ram_wr_sel = `OC8051_RWS_ACC;
190
          src_sel1 = `OC8051_ASS_IMM;
191
          src_sel2 = `OC8051_ASS_DC;
192
          alu_op = `OC8051_ALU_NOP;
193
          wr = 1'b1;
194
          psw_set = `OC8051_PS_NOT;
195
          cy_sel = `OC8051_CY_0;
196
          pc_wr = `OC8051_PCW_N;
197
          pc_sel = `OC8051_PIS_DC;
198
          imm_sel = `OC8051_IDS_OP1;
199
          src_sel3 = `OC8051_AS3_DP;
200
          comp_sel = `OC8051_CSS_DC;
201
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
202
          wad2 = `OC8051_WAD_N;
203
          rom_addr_sel = `OC8051_RAS_PC;
204
          ext_addr_sel = `OC8051_EAS_DC;
205
 
206
        end
207
      `OC8051_MOVC_PC :begin
208
          ram_rd_sel = `OC8051_RRS_DC;
209
          ram_wr_sel = `OC8051_RWS_ACC;
210
          src_sel1 = `OC8051_ASS_IMM;
211
          src_sel2 = `OC8051_ASS_DC;
212
          alu_op = `OC8051_ALU_NOP;
213
          wr = 1'b1;
214
          psw_set = `OC8051_PS_NOT;
215
          cy_sel = `OC8051_CY_0;
216
          pc_wr = `OC8051_PCW_N;
217
          pc_sel = `OC8051_PIS_DC;
218
          imm_sel = `OC8051_IDS_OP1;
219
          src_sel3 = `OC8051_AS3_PC;
220
          comp_sel = `OC8051_CSS_DC;
221
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
222
          wad2 = `OC8051_WAD_N;
223
          rom_addr_sel = `OC8051_RAS_PC;
224
          ext_addr_sel = `OC8051_EAS_DC;
225
        end
226
      default begin
227
          ram_rd_sel = `OC8051_RRS_DC;
228
          ram_wr_sel = `OC8051_RWS_DC;
229
          src_sel1 = `OC8051_ASS_DC;
230
          src_sel2 = `OC8051_ASS_DC;
231
          alu_op = `OC8051_ALU_NOP;
232
          wr = 1'b0;
233
          psw_set = `OC8051_PS_NOT;
234
          cy_sel = `OC8051_CY_0;
235
          pc_wr = `OC8051_PCW_N;
236
          pc_sel = `OC8051_PIS_DC;
237
          imm_sel = `OC8051_IDS_DC;
238
          src_sel3 = `OC8051_AS3_DC;
239
          comp_sel = `OC8051_CSS_DC;
240
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
241
          wad2 = `OC8051_WAD_N;
242
          rom_addr_sel = `OC8051_RAS_PC;
243
          ext_addr_sel = `OC8051_EAS_DC;
244
 
245
      end
246
    endcase
247
    end
248
    2'b10:
249
    casex (op)
250
      `OC8051_CJNE_R : begin
251
          ram_rd_sel = `OC8051_RRS_DC;
252
          ram_wr_sel = `OC8051_RWS_DC;
253
          src_sel1 = `OC8051_ASS_DC;
254
          src_sel2 = `OC8051_ASS_DC;
255
          alu_op = `OC8051_ALU_NOP;
256
          wr = 1'b0;
257
          psw_set = `OC8051_PS_NOT;
258
          cy_sel = `OC8051_CY_0;
259
          pc_wr = !eq;
260
          pc_sel = `OC8051_PIS_ALU;
261
          imm_sel = `OC8051_IDS_DC;
262
          src_sel3 = `OC8051_AS3_DC;
263
          comp_sel = `OC8051_CSS_DES;
264
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
265
          wad2 = `OC8051_WAD_N;
266
          rom_addr_sel = `OC8051_RAS_PC;
267
          ext_addr_sel = `OC8051_EAS_DC;
268
 
269
        end
270
      `OC8051_CJNE_I : begin
271
          ram_rd_sel = `OC8051_RRS_DC;
272
          ram_wr_sel = `OC8051_RWS_DC;
273
          src_sel1 = `OC8051_ASS_DC;
274
          src_sel2 = `OC8051_ASS_DC;
275
          alu_op = `OC8051_ALU_NOP;
276
          wr = 1'b0;
277
          psw_set = `OC8051_PS_NOT;
278
          cy_sel = `OC8051_CY_0;
279
          pc_wr = !eq;
280
          pc_sel = `OC8051_PIS_ALU;
281
          imm_sel = `OC8051_IDS_DC;
282
          src_sel3 = `OC8051_AS3_DC;
283
          comp_sel = `OC8051_CSS_DES;
284
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
285
          wad2 = `OC8051_WAD_N;
286
          rom_addr_sel = `OC8051_RAS_PC;
287
          ext_addr_sel = `OC8051_EAS_DC;
288
 
289
        end
290
      `OC8051_CJNE_D : begin
291
          ram_rd_sel = `OC8051_RRS_DC;
292
          ram_wr_sel = `OC8051_RWS_DC;
293
          src_sel1 = `OC8051_ASS_DC;
294
          src_sel2 = `OC8051_ASS_DC;
295
          alu_op = `OC8051_ALU_NOP;
296
          wr = 1'b0;
297
          psw_set = `OC8051_PS_NOT;
298
          cy_sel = `OC8051_CY_0;
299
          pc_wr = !eq;
300
          pc_sel = `OC8051_PIS_ALU;
301
          imm_sel = `OC8051_IDS_DC;
302
          src_sel3 = `OC8051_AS3_DC;
303
          comp_sel = `OC8051_CSS_DES;
304
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
305
          wad2 = `OC8051_WAD_N;
306
          rom_addr_sel = `OC8051_RAS_PC;
307
          ext_addr_sel = `OC8051_EAS_DC;
308
 
309
        end
310
      `OC8051_CJNE_C : begin
311
          ram_rd_sel = `OC8051_RRS_DC;
312
          ram_wr_sel = `OC8051_RWS_DC;
313
          src_sel1 = `OC8051_ASS_DC;
314
          src_sel2 = `OC8051_ASS_DC;
315
          alu_op = `OC8051_ALU_NOP;
316
          wr = 1'b0;
317
          psw_set = `OC8051_PS_NOT;
318
          cy_sel = `OC8051_CY_0;
319
          pc_wr = !eq;
320
          pc_sel = `OC8051_PIS_ALU;
321
          imm_sel = `OC8051_IDS_DC;
322
          src_sel3 = `OC8051_AS3_DC;
323
          comp_sel = `OC8051_CSS_DES;
324
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
325
          wad2 = `OC8051_WAD_N;
326
          rom_addr_sel = `OC8051_RAS_PC;
327
          ext_addr_sel = `OC8051_EAS_DC;
328
 
329
        end
330
      `OC8051_DJNZ_R : begin
331
          ram_rd_sel = `OC8051_RRS_DC;
332
          ram_wr_sel = `OC8051_RWS_DC;
333
          src_sel1 = `OC8051_ASS_DC;
334
          src_sel2 = `OC8051_ASS_DC;
335
          alu_op = `OC8051_ALU_NOP;
336
          wr = 1'b0;
337
          psw_set = `OC8051_PS_NOT;
338
          cy_sel = `OC8051_CY_0;
339
          pc_wr = !eq;
340
          pc_sel = `OC8051_PIS_ALU;
341
          imm_sel = `OC8051_IDS_DC;
342
          src_sel3 = `OC8051_AS3_DC;
343
          comp_sel = `OC8051_CSS_DES;
344
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
345
          wad2 = `OC8051_WAD_N;
346
          rom_addr_sel = `OC8051_RAS_PC;
347
          ext_addr_sel = `OC8051_EAS_DC;
348
 
349
        end
350
      `OC8051_DJNZ_D : begin
351
          ram_rd_sel = `OC8051_RRS_DC;
352
          ram_wr_sel = `OC8051_RWS_DC;
353
          src_sel1 = `OC8051_ASS_DC;
354
          src_sel2 = `OC8051_ASS_DC;
355
          alu_op = `OC8051_ALU_NOP;
356
          wr = 1'b0;
357
          psw_set = `OC8051_PS_NOT;
358
          cy_sel = `OC8051_CY_0;
359
          pc_wr = !eq;
360
          pc_sel = `OC8051_PIS_ALU;
361
          imm_sel = `OC8051_IDS_DC;
362
          src_sel3 = `OC8051_AS3_DC;
363
          comp_sel = `OC8051_CSS_DES;
364
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
365
          wad2 = `OC8051_WAD_N;
366
          rom_addr_sel = `OC8051_RAS_PC;
367
          ext_addr_sel = `OC8051_EAS_DC;
368
 
369
        end
370
      `OC8051_JB : begin
371
          ram_rd_sel = `OC8051_RRS_DC;
372
          ram_wr_sel = `OC8051_RWS_DC;
373
          src_sel1 = `OC8051_ASS_DC;
374
          src_sel2 = `OC8051_ASS_DC;
375
          alu_op = `OC8051_ALU_NOP;
376
          wr = 1'b0;
377
          psw_set = `OC8051_PS_NOT;
378
          cy_sel = `OC8051_CY_0;
379
          pc_wr = eq;
380
          pc_sel = `OC8051_PIS_ALU;
381
          imm_sel = `OC8051_IDS_DC;
382
          src_sel3 = `OC8051_AS3_DC;
383
          comp_sel = `OC8051_CSS_BIT;
384
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
385
          wad2 = `OC8051_WAD_N;
386
          rom_addr_sel = `OC8051_RAS_PC;
387
          ext_addr_sel = `OC8051_EAS_DC;
388
 
389
        end
390
      `OC8051_JBC : begin
391
          ram_rd_sel = `OC8051_RRS_DC;
392
          ram_wr_sel = `OC8051_RWS_D;
393
          src_sel1 = `OC8051_ASS_DC;
394
          src_sel2 = `OC8051_ASS_DC;
395
          alu_op = `OC8051_ALU_NOP;
396
          wr = 1'b1;
397
          psw_set = `OC8051_PS_NOT;
398
          cy_sel = `OC8051_CY_0;
399
          pc_wr = eq;
400
          pc_sel = `OC8051_PIS_ALU;
401
          imm_sel = `OC8051_IDS_DC;
402
          src_sel3 = `OC8051_AS3_DC;
403
          comp_sel = `OC8051_CSS_BIT;
404
          rmw = `OC8051_RMW_N;        bit_addr = 1'b1;
405
          wad2 = `OC8051_WAD_N;
406
          rom_addr_sel = `OC8051_RAS_PC;
407
          ext_addr_sel = `OC8051_EAS_DC;
408
 
409
        end
410
      `OC8051_JC : begin
411
          ram_rd_sel = `OC8051_RRS_DC;
412
          ram_wr_sel = `OC8051_RWS_DC;
413
          src_sel1 = `OC8051_ASS_DC;
414
          src_sel2 = `OC8051_ASS_DC;
415
          alu_op = `OC8051_ALU_NOP;
416
          wr = 1'b0;
417
          psw_set = `OC8051_PS_NOT;
418
          cy_sel = `OC8051_CY_0;
419
          pc_wr = eq;
420
          pc_sel = `OC8051_PIS_ALU;
421
          imm_sel = `OC8051_IDS_DC;
422
          src_sel3 = `OC8051_AS3_DC;
423
          comp_sel = `OC8051_CSS_CY;
424
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
425
          wad2 = `OC8051_WAD_N;
426
          rom_addr_sel = `OC8051_RAS_PC;
427
          ext_addr_sel = `OC8051_EAS_DC;
428
 
429
        end
430
      `OC8051_JMP : begin
431
          ram_rd_sel = `OC8051_RRS_DC;
432
          ram_wr_sel = `OC8051_RWS_DC;
433
          src_sel1 = `OC8051_ASS_DC;
434
          src_sel2 = `OC8051_ASS_DC;
435
          alu_op = `OC8051_ALU_NOP;
436
          wr = 1'b0;
437
          psw_set = `OC8051_PS_NOT;
438
          cy_sel = `OC8051_CY_0;
439
          pc_wr = `OC8051_PCW_Y;
440
          pc_sel = `OC8051_PIS_ALU;
441
          imm_sel = `OC8051_IDS_DC;
442
          src_sel3 = `OC8051_AS3_DC;
443
          comp_sel = `OC8051_CSS_BIT;
444
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
445
          wad2 = `OC8051_WAD_N;
446
          rom_addr_sel = `OC8051_RAS_PC;
447
          ext_addr_sel = `OC8051_EAS_DC;
448
 
449
        end
450
      `OC8051_JNB : begin
451
          ram_rd_sel = `OC8051_RRS_DC;
452
          ram_wr_sel = `OC8051_RWS_DC;
453
          src_sel1 = `OC8051_ASS_DC;
454
          src_sel2 = `OC8051_ASS_DC;
455
          alu_op = `OC8051_ALU_NOP;
456
          wr = 1'b0;
457
          psw_set = `OC8051_PS_NOT;
458
          cy_sel = `OC8051_CY_0;
459
          pc_wr = !eq;
460
          pc_sel = `OC8051_PIS_ALU;
461
          imm_sel = `OC8051_IDS_DC;
462
          src_sel3 = `OC8051_AS3_DC;
463
          comp_sel = `OC8051_CSS_BIT;
464
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
465
          wad2 = `OC8051_WAD_N;
466
          rom_addr_sel = `OC8051_RAS_PC;
467
          ext_addr_sel = `OC8051_EAS_DC;
468
 
469
        end
470
      `OC8051_JNC : begin
471
          ram_rd_sel = `OC8051_RRS_DC;
472
          ram_wr_sel = `OC8051_RWS_DC;
473
          src_sel1 = `OC8051_ASS_DC;
474
          src_sel2 = `OC8051_ASS_DC;
475
          alu_op = `OC8051_ALU_NOP;
476
          wr = 1'b0;
477
          psw_set = `OC8051_PS_NOT;
478
          cy_sel = `OC8051_CY_0;
479
          pc_wr = !eq;
480
          pc_sel = `OC8051_PIS_ALU;
481
          imm_sel = `OC8051_IDS_DC;
482
          src_sel3 = `OC8051_AS3_DC;
483
          comp_sel = `OC8051_CSS_CY;
484
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
485
          wad2 = `OC8051_WAD_N;
486
          rom_addr_sel = `OC8051_RAS_PC;
487
          ext_addr_sel = `OC8051_EAS_DC;
488
 
489
        end
490
      `OC8051_JNZ : begin
491
          ram_rd_sel = `OC8051_RRS_DC;
492
          ram_wr_sel = `OC8051_RWS_DC;
493
          src_sel1 = `OC8051_ASS_DC;
494
          src_sel2 = `OC8051_ASS_DC;
495
          alu_op = `OC8051_ALU_NOP;
496
          wr = 1'b0;
497
          psw_set = `OC8051_PS_NOT;
498
          cy_sel = `OC8051_CY_0;
499
          pc_wr = !eq;
500
          pc_sel = `OC8051_PIS_ALU;
501
          imm_sel = `OC8051_IDS_DC;
502
          src_sel3 = `OC8051_AS3_DC;
503
          comp_sel = `OC8051_CSS_AZ;
504
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
505
          wad2 = `OC8051_WAD_N;
506
          rom_addr_sel = `OC8051_RAS_PC;
507
          ext_addr_sel = `OC8051_EAS_DC;
508
 
509
        end
510
      `OC8051_JZ : begin
511
          ram_rd_sel = `OC8051_RRS_DC;
512
          ram_wr_sel = `OC8051_RWS_DC;
513
          src_sel1 = `OC8051_ASS_DC;
514
          src_sel2 = `OC8051_ASS_DC;
515
          alu_op = `OC8051_ALU_NOP;
516
          wr = 1'b0;
517
          psw_set = `OC8051_PS_NOT;
518
          cy_sel = `OC8051_CY_0;
519
          pc_wr = eq;
520
          pc_sel = `OC8051_PIS_ALU;
521
          imm_sel = `OC8051_IDS_DC;
522
          src_sel3 = `OC8051_AS3_DC;
523
          comp_sel = `OC8051_CSS_AZ;
524
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
525
          wad2 = `OC8051_WAD_N;
526
          rom_addr_sel = `OC8051_RAS_PC;
527
          ext_addr_sel = `OC8051_EAS_DC;
528
 
529
        end
530
      `OC8051_MOVC_DP :begin
531
          ram_rd_sel = `OC8051_RRS_DC;
532
          ram_wr_sel = `OC8051_RWS_DC;
533
          src_sel1 = `OC8051_ASS_DC;
534
          src_sel2 = `OC8051_ASS_DC;
535
          alu_op = `OC8051_ALU_NOP;
536
          wr = 1'b0;
537
          psw_set = `OC8051_PS_NOT;
538
          cy_sel = `OC8051_CY_0;
539
          pc_wr = `OC8051_PCW_N;
540
          pc_sel = `OC8051_PIS_DC;
541
          imm_sel = `OC8051_IDS_DC;
542
          src_sel3 = `OC8051_AS3_DP;
543
          comp_sel = `OC8051_CSS_DC;
544
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
545
          wad2 = `OC8051_WAD_N;
546
          rom_addr_sel = `OC8051_RAS_DES;
547
          ext_addr_sel = `OC8051_EAS_DC;
548
 
549
        end
550
      `OC8051_MOVC_PC :begin
551
          ram_rd_sel = `OC8051_RRS_DC;
552
          ram_wr_sel = `OC8051_RWS_DC;
553
          src_sel1 = `OC8051_ASS_DC;
554
          src_sel2 = `OC8051_ASS_DC;
555
          alu_op = `OC8051_ALU_NOP;
556
          wr = 1'b0;
557
          psw_set = `OC8051_PS_NOT;
558
          cy_sel = `OC8051_CY_0;
559
          pc_wr = `OC8051_PCW_N;
560
          pc_sel = `OC8051_PIS_DC;
561
          imm_sel = `OC8051_IDS_DC;
562
          src_sel3 = `OC8051_AS3_PC;
563
          comp_sel = `OC8051_CSS_DC;
564
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
565
          wad2 = `OC8051_WAD_N;
566
          rom_addr_sel = `OC8051_RAS_DES;
567
          ext_addr_sel = `OC8051_EAS_DC;
568
        end
569
      `OC8051_SJMP : begin
570
          ram_rd_sel = `OC8051_RRS_DC;
571
          ram_wr_sel = `OC8051_RWS_DC;
572
          src_sel1 = `OC8051_ASS_DC;
573
          src_sel2 = `OC8051_ASS_DC;
574
          alu_op = `OC8051_ALU_NOP;
575
          wr = 1'b0;
576
          psw_set = `OC8051_PS_NOT;
577
          cy_sel = `OC8051_CY_0;
578
          pc_wr = `OC8051_PCW_Y;
579
          pc_sel = `OC8051_PIS_ALU;
580
          imm_sel = `OC8051_IDS_DC;
581
          src_sel3 = `OC8051_AS3_DC;
582
          comp_sel = `OC8051_CSS_DC;
583
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
584
          wad2 = `OC8051_WAD_N;
585
          rom_addr_sel = `OC8051_RAS_PC;
586
          ext_addr_sel = `OC8051_EAS_DC;
587
        end
588
      default begin
589
          ram_rd_sel = `OC8051_RRS_DC;
590
          ram_wr_sel = `OC8051_RWS_DC;
591
          src_sel1 = `OC8051_ASS_DC;
592
          src_sel2 = `OC8051_ASS_DC;
593
          alu_op = `OC8051_ALU_NOP;
594
          wr = 1'b0;
595
          psw_set = `OC8051_PS_NOT;
596
          cy_sel = `OC8051_CY_0;
597
          pc_wr = `OC8051_PCW_N;
598
          pc_sel = `OC8051_PIS_DC;
599
          imm_sel = `OC8051_IDS_DC;
600
          src_sel3 = `OC8051_AS3_DC;
601
          comp_sel = `OC8051_CSS_DC;
602
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
603
          wad2 = `OC8051_WAD_N;
604
          rom_addr_sel = `OC8051_RAS_PC;
605
          ext_addr_sel = `OC8051_EAS_DC;
606
      end
607
    endcase
608
 
609
    2'b11:
610
    casex (op)
611
      `OC8051_CJNE_R : begin
612
          ram_rd_sel = `OC8051_RRS_DC;
613
          ram_wr_sel = `OC8051_RWS_DC;
614
          src_sel1 = `OC8051_ASS_IMM;
615
          src_sel2 = `OC8051_ASS_IMM;
616
          alu_op = `OC8051_ALU_PCS;
617
          wr = 1'b0;
618
          psw_set = `OC8051_PS_NOT;
619
          cy_sel = `OC8051_CY_0;
620
          pc_wr = `OC8051_PCW_N;
621
          pc_sel = `OC8051_PIS_DC;
622
          imm_sel = `OC8051_IDS_OP3_PCL;
623
          src_sel3 = `OC8051_AS3_PC;
624
          comp_sel = `OC8051_CSS_DC;
625
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
626
          wad2 = `OC8051_WAD_N;
627
          rom_addr_sel = `OC8051_RAS_PC;
628
          ext_addr_sel = `OC8051_EAS_DC;
629
        end
630
      `OC8051_CJNE_I : begin
631
          ram_rd_sel = `OC8051_RRS_DC;
632
          ram_wr_sel = `OC8051_RWS_DC;
633
          src_sel1 = `OC8051_ASS_IMM;
634
          src_sel2 = `OC8051_ASS_IMM;
635
          alu_op = `OC8051_ALU_PCS;
636
          wr = 1'b0;
637
          psw_set = `OC8051_PS_NOT;
638
          cy_sel = `OC8051_CY_0;
639
          pc_wr = `OC8051_PCW_N;
640
          pc_sel = `OC8051_PIS_DC;
641
          imm_sel = `OC8051_IDS_OP3_PCL;
642
          src_sel3 = `OC8051_AS3_PC;
643
          comp_sel = `OC8051_CSS_DC;
644
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
645
          wad2 = `OC8051_WAD_N;
646
          rom_addr_sel = `OC8051_RAS_PC;
647
          ext_addr_sel = `OC8051_EAS_DC;
648
        end
649
      `OC8051_CJNE_D : begin
650
          ram_rd_sel = `OC8051_RRS_DC;
651
          ram_wr_sel = `OC8051_RWS_DC;
652
          src_sel1 = `OC8051_ASS_IMM;
653
          src_sel2 = `OC8051_ASS_IMM;
654
          alu_op = `OC8051_ALU_PCS;
655
          wr = 1'b0;
656
          psw_set = `OC8051_PS_NOT;
657
          cy_sel = `OC8051_CY_0;
658
          pc_wr = `OC8051_PCW_N;
659
          pc_sel = `OC8051_PIS_DC;
660
          imm_sel = `OC8051_IDS_OP3_PCL;
661
          src_sel3 = `OC8051_AS3_PC;
662
          comp_sel = `OC8051_CSS_DC;
663
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
664
          wad2 = `OC8051_WAD_N;
665
          rom_addr_sel = `OC8051_RAS_PC;
666
          ext_addr_sel = `OC8051_EAS_DC;
667
        end
668
      `OC8051_CJNE_C : begin
669
          ram_rd_sel = `OC8051_RRS_DC;
670
          ram_wr_sel = `OC8051_RWS_DC;
671
          src_sel1 = `OC8051_ASS_IMM;
672
          src_sel2 = `OC8051_ASS_IMM;
673
          alu_op = `OC8051_ALU_PCS;
674
          wr = 1'b0;
675
          psw_set = `OC8051_PS_NOT;
676
          cy_sel = `OC8051_CY_0;
677
          pc_wr = `OC8051_PCW_N;
678
          pc_sel = `OC8051_PIS_DC;
679
          imm_sel = `OC8051_IDS_OP3_PCL;
680
          src_sel3 = `OC8051_AS3_PC;
681
          comp_sel = `OC8051_CSS_DC;
682
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
683
          wad2 = `OC8051_WAD_N;
684
          rom_addr_sel = `OC8051_RAS_PC;
685
          ext_addr_sel = `OC8051_EAS_DC;
686
        end
687
      `OC8051_DJNZ_R : begin
688
          ram_rd_sel = `OC8051_RRS_DC;
689
          ram_wr_sel = `OC8051_RWS_DC;
690
          src_sel1 = `OC8051_ASS_IMM;
691
          src_sel2 = `OC8051_ASS_IMM;
692
          alu_op = `OC8051_ALU_PCS;
693
          wr = 1'b0;
694
          psw_set = `OC8051_PS_NOT;
695
          cy_sel = `OC8051_CY_0;
696
          pc_wr = `OC8051_PCW_N;
697
          pc_sel = `OC8051_PIS_DC;
698
          imm_sel = `OC8051_IDS_OP2_PCL;
699
          src_sel3 = `OC8051_AS3_PC;
700
          comp_sel = `OC8051_CSS_DC;
701
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
702
          wad2 = `OC8051_WAD_N;
703
          rom_addr_sel = `OC8051_RAS_PC;
704
          ext_addr_sel = `OC8051_EAS_DC;
705
        end
706
      `OC8051_DJNZ_D : begin
707
          ram_rd_sel = `OC8051_RRS_DC;
708
          ram_wr_sel = `OC8051_RWS_DC;
709
          src_sel1 = `OC8051_ASS_IMM;
710
          src_sel2 = `OC8051_ASS_IMM;
711
          alu_op = `OC8051_ALU_PCS;
712
          wr = 1'b0;
713
          psw_set = `OC8051_PS_NOT;
714
          cy_sel = `OC8051_CY_0;
715
          pc_wr = `OC8051_PCW_N;
716
          pc_sel = `OC8051_PIS_DC;
717
          imm_sel = `OC8051_IDS_OP3_PCL;
718
          src_sel3 = `OC8051_AS3_PC;
719
          comp_sel = `OC8051_CSS_DC;
720
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
721
          wad2 = `OC8051_WAD_N;
722
          rom_addr_sel = `OC8051_RAS_PC;
723
          ext_addr_sel = `OC8051_EAS_DC;
724
        end
725
      `OC8051_RET : begin
726
          ram_rd_sel = `OC8051_RRS_SP;
727
          ram_wr_sel = `OC8051_RWS_DC;
728
          src_sel1 = `OC8051_ASS_RAM;
729
          src_sel2 = `OC8051_ASS_DC;
730
          alu_op = `OC8051_ALU_NOP;
731
          wr = 1'b0;
732
          psw_set = `OC8051_PS_NOT;
733
          cy_sel = `OC8051_CY_0;
734
          pc_wr = `OC8051_PCW_Y;
735
          pc_sel = `OC8051_PIS_SP;
736
          imm_sel = `OC8051_IDS_DC;
737
          src_sel3 = `OC8051_AS3_DC;
738
          comp_sel = `OC8051_CSS_DC;
739
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
740
          wad2 = `OC8051_WAD_N;
741
          rom_addr_sel = `OC8051_RAS_PC;
742
          ext_addr_sel = `OC8051_EAS_DC;
743
        end
744
      `OC8051_RETI : begin
745
          ram_rd_sel = `OC8051_RRS_SP;
746
          ram_wr_sel = `OC8051_RWS_DC;
747
          src_sel1 = `OC8051_ASS_RAM;
748
          src_sel2 = `OC8051_ASS_DC;
749
          alu_op = `OC8051_ALU_NOP;
750
          wr = 1'b0;
751
          psw_set = `OC8051_PS_NOT;
752
          cy_sel = `OC8051_CY_0;
753
          pc_wr = `OC8051_PCW_Y;
754
          pc_sel = `OC8051_PIS_SP;
755
          imm_sel = `OC8051_IDS_DC;
756
          src_sel3 = `OC8051_AS3_DC;
757
          comp_sel = `OC8051_CSS_DC;
758
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
759
          wad2 = `OC8051_WAD_N;
760
          rom_addr_sel = `OC8051_RAS_PC;
761
          ext_addr_sel = `OC8051_EAS_DC;
762
        end
763
      default begin
764
          ram_rd_sel = `OC8051_RRS_DC;
765
          ram_wr_sel = `OC8051_RWS_DC;
766
          src_sel1 = `OC8051_ASS_DC;
767
          src_sel2 = `OC8051_ASS_DC;
768
          alu_op = `OC8051_ALU_NOP;
769
          wr = 1'b0;
770
          psw_set = `OC8051_PS_NOT;
771
          cy_sel = `OC8051_CY_0;
772
          pc_wr = `OC8051_PCW_N;
773
          pc_sel = `OC8051_PIS_DC;
774
          imm_sel = `OC8051_IDS_DC;
775
          src_sel3 = `OC8051_AS3_DC;
776
          comp_sel = `OC8051_CSS_DC;
777
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
778
          wad2 = `OC8051_WAD_N;
779
          rom_addr_sel = `OC8051_RAS_PC;
780
          ext_addr_sel = `OC8051_EAS_DC;
781
      end
782
    endcase
783
    default: begin
784
    casex (op_in)
785
      `OC8051_ACALL :begin
786
          ram_rd_sel = `OC8051_RRS_DC;
787
          ram_wr_sel = `OC8051_RWS_SP;
788
          src_sel1 = `OC8051_ASS_IMM;
789
          src_sel2 = `OC8051_ASS_DC;
790
          alu_op = `OC8051_ALU_NOP;
791
          imm_sel = `OC8051_IDS_PCL;
792
          wr = 1'b1;
793
          psw_set = `OC8051_PS_NOT;
794
          cy_sel = `OC8051_CY_0;
795
          pc_wr = `OC8051_PCW_Y;
796
          pc_sel = `OC8051_PIS_I11;
797
          src_sel3 = `OC8051_AS3_DC;
798
          comp_sel = `OC8051_CSS_DC;
799
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
800
          wad2 = `OC8051_WAD_N;
801
          rom_addr_sel = `OC8051_RAS_PC;
802
          ext_addr_sel = `OC8051_EAS_DC;
803
        end
804
      `OC8051_AJMP : begin
805
          ram_rd_sel = `OC8051_RRS_DC;
806
          ram_wr_sel = `OC8051_RWS_DC;
807
          src_sel1 = `OC8051_ASS_DC;
808
          src_sel2 = `OC8051_ASS_DC;
809
          alu_op = `OC8051_ALU_NOP;
810
          imm_sel = `OC8051_IDS_DC;
811
          wr = 1'b0;
812
          psw_set = `OC8051_PS_NOT;
813
          cy_sel = `OC8051_CY_0;
814
          pc_wr = `OC8051_PCW_Y;
815
          pc_sel = `OC8051_PIS_I11;
816
          src_sel3 = `OC8051_AS3_DC;
817
          comp_sel = `OC8051_CSS_DC;
818
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
819
          wad2 = `OC8051_WAD_N;
820
          rom_addr_sel = `OC8051_RAS_PC;
821
          ext_addr_sel = `OC8051_EAS_DC;
822
        end
823
 
824
 
825
      `OC8051_ADD_R : begin
826
          ram_rd_sel = `OC8051_RRS_RN;
827
          ram_wr_sel = `OC8051_RWS_ACC;
828
          src_sel1 = `OC8051_ASS_ACC;
829
          src_sel2 = `OC8051_ASS_RAM;
830
          alu_op = `OC8051_ALU_ADD;
831
          wr = 1'b1;
832
          psw_set = `OC8051_PS_AC;
833
          cy_sel = `OC8051_CY_0;
834
          pc_wr = `OC8051_PCW_N;
835
          pc_sel = `OC8051_PIS_DC;
836
          imm_sel = `OC8051_IDS_DC;
837
          src_sel3 = `OC8051_AS3_DC;
838
          comp_sel = `OC8051_CSS_DC;
839
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
840
          wad2 = `OC8051_WAD_N;
841
          rom_addr_sel = `OC8051_RAS_PC;
842
          ext_addr_sel = `OC8051_EAS_DC;
843
        end
844
      `OC8051_ADDC_R : begin
845
          ram_rd_sel = `OC8051_RRS_RN;
846
          ram_wr_sel = `OC8051_RWS_ACC;
847
          src_sel1 = `OC8051_ASS_ACC;
848
          src_sel2 = `OC8051_ASS_RAM;
849
          alu_op = `OC8051_ALU_ADD;
850
          wr = 1'b1;
851
          psw_set = `OC8051_PS_AC;
852
          cy_sel = `OC8051_CY_PSW;
853
          pc_wr = `OC8051_PCW_N;
854
          pc_sel = `OC8051_PIS_DC;
855
          imm_sel = `OC8051_IDS_DC;
856
          src_sel3 = `OC8051_AS3_DC;
857
          comp_sel = `OC8051_CSS_DC;
858
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
859
          wad2 = `OC8051_WAD_N;
860
          rom_addr_sel = `OC8051_RAS_PC;
861
          ext_addr_sel = `OC8051_EAS_DC;
862
        end
863
      `OC8051_ANL_R : begin
864
          ram_rd_sel = `OC8051_RRS_RN;
865
          ram_wr_sel = `OC8051_RWS_ACC;
866
          src_sel1 = `OC8051_ASS_ACC;
867
          src_sel2 = `OC8051_ASS_RAM;
868
          alu_op = `OC8051_ALU_AND;
869
          wr = 1'b1;
870
          psw_set = `OC8051_PS_NOT;
871
          cy_sel = `OC8051_CY_0;
872
          pc_wr = `OC8051_PCW_N;
873
          pc_sel = `OC8051_PIS_DC;
874
          imm_sel = `OC8051_IDS_DC;
875
          src_sel3 = `OC8051_AS3_DC;
876
          comp_sel = `OC8051_CSS_DC;
877
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
878
          wad2 = `OC8051_WAD_N;
879
          rom_addr_sel = `OC8051_RAS_PC;
880
          ext_addr_sel = `OC8051_EAS_DC;
881
        end
882
      `OC8051_CJNE_R : begin
883
          ram_rd_sel = `OC8051_RRS_RN;
884
          ram_wr_sel = `OC8051_RWS_DC;
885
          src_sel1 = `OC8051_ASS_RAM;
886
          src_sel2 = `OC8051_ASS_IMM;
887
          alu_op = `OC8051_ALU_SUB;
888
          wr = 1'b0;
889
          psw_set = `OC8051_PS_CY;
890
          cy_sel = `OC8051_CY_0;
891
          pc_wr = `OC8051_PCW_N;
892
          pc_sel = `OC8051_PIS_DC;
893
          imm_sel = `OC8051_IDS_OP2;
894
          src_sel3 = `OC8051_AS3_DC;
895
          comp_sel = `OC8051_CSS_DC;
896
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
897
          wad2 = `OC8051_WAD_N;
898
          rom_addr_sel = `OC8051_RAS_PC;
899
          ext_addr_sel = `OC8051_EAS_DC;
900
        end
901
      `OC8051_DEC_R : begin
902
          ram_rd_sel = `OC8051_RRS_RN;
903
          ram_wr_sel = `OC8051_RWS_RN;
904
          src_sel1 = `OC8051_ASS_RAM;
905
          src_sel2 = `OC8051_ASS_ZERO;
906
          alu_op = `OC8051_ALU_SUB;
907
          wr = 1'b1;
908
          psw_set = `OC8051_PS_NOT;
909
          cy_sel = `OC8051_CY_1;
910
          pc_wr = `OC8051_PCW_N;
911
          pc_sel = `OC8051_PIS_DC;
912
          imm_sel = `OC8051_IDS_DC;
913
          src_sel3 = `OC8051_AS3_DC;
914
          comp_sel = `OC8051_CSS_DC;
915
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
916
          wad2 = `OC8051_WAD_N;
917
          rom_addr_sel = `OC8051_RAS_PC;
918
          ext_addr_sel = `OC8051_EAS_DC;
919
        end
920
      `OC8051_DJNZ_R : begin
921
          ram_rd_sel = `OC8051_RRS_RN;
922
          ram_wr_sel = `OC8051_RWS_RN;
923
          src_sel1 = `OC8051_ASS_RAM;
924
          src_sel2 = `OC8051_ASS_ZERO;
925
          alu_op = `OC8051_ALU_SUB;
926
          wr = 1'b1;
927
          psw_set = `OC8051_PS_NOT;
928
          cy_sel = `OC8051_CY_1;
929
          pc_wr = `OC8051_PCW_N;
930
          pc_sel = `OC8051_PIS_DC;
931
          imm_sel = `OC8051_IDS_DC;
932
          src_sel3 = `OC8051_AS3_DC;
933
          comp_sel = `OC8051_CSS_DC;
934
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
935
          wad2 = `OC8051_WAD_N;
936
          rom_addr_sel = `OC8051_RAS_PC;
937
          ext_addr_sel = `OC8051_EAS_DC;
938
        end
939
      `OC8051_INC_R : begin
940
          ram_rd_sel = `OC8051_RRS_RN;
941
          ram_wr_sel = `OC8051_RWS_RN;
942
          src_sel1 = `OC8051_ASS_RAM;
943
          src_sel2 = `OC8051_ASS_ZERO;
944
          alu_op = `OC8051_ALU_ADD;
945
          wr = 1'b1;
946
          psw_set = `OC8051_PS_NOT;
947
          cy_sel = `OC8051_CY_1;
948
          pc_wr = `OC8051_PCW_N;
949
          pc_sel = `OC8051_PIS_DC;
950
          imm_sel = `OC8051_IDS_DC;
951
          src_sel3 = `OC8051_AS3_DC;
952
          comp_sel = `OC8051_CSS_DC;
953
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
954
          wad2 = `OC8051_WAD_N;
955
          rom_addr_sel = `OC8051_RAS_PC;
956
          ext_addr_sel = `OC8051_EAS_DC;
957
        end
958
      `OC8051_MOV_R : begin
959
          ram_rd_sel = `OC8051_RRS_RN;
960
          ram_wr_sel = `OC8051_RWS_ACC;
961
          src_sel1 = `OC8051_ASS_RAM;
962
          src_sel2 = `OC8051_ASS_DC;
963
          alu_op = `OC8051_ALU_NOP;
964
          wr = 1'b1;
965
          psw_set = `OC8051_PS_NOT;
966
          cy_sel = `OC8051_CY_0;
967
          pc_wr = `OC8051_PCW_N;
968
          pc_sel = `OC8051_PIS_DC;
969
          imm_sel = `OC8051_IDS_DC;
970
          src_sel3 = `OC8051_AS3_DC;
971
          comp_sel = `OC8051_CSS_DC;
972
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
973
          wad2 = `OC8051_WAD_N;
974
          rom_addr_sel = `OC8051_RAS_PC;
975
          ext_addr_sel = `OC8051_EAS_DC;
976
        end
977
 
978
      `OC8051_MOV_AR : begin
979
          ram_rd_sel = `OC8051_RRS_DC;
980
          ram_wr_sel = `OC8051_RWS_RN;
981
          src_sel1 = `OC8051_ASS_ACC;
982
          src_sel2 = `OC8051_ASS_DC;
983
          alu_op = `OC8051_ALU_NOP;
984
          wr = 1'b1;
985
          psw_set = `OC8051_PS_NOT;
986
          cy_sel = `OC8051_CY_0;
987
          pc_wr = `OC8051_PCW_N;
988
          pc_sel = `OC8051_PIS_DC;
989
          imm_sel = `OC8051_IDS_DC;
990
          src_sel3 = `OC8051_AS3_DC;
991
          comp_sel = `OC8051_CSS_DC;
992
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
993
          wad2 = `OC8051_WAD_N;
994
          rom_addr_sel = `OC8051_RAS_PC;
995
          ext_addr_sel = `OC8051_EAS_DC;
996
        end
997
      `OC8051_MOV_DR : begin
998
          ram_rd_sel = `OC8051_RRS_D;
999
          ram_wr_sel = `OC8051_RWS_RN;
1000
          src_sel1 = `OC8051_ASS_RAM;
1001
          src_sel2 = `OC8051_ASS_DC;
1002
          alu_op = `OC8051_ALU_NOP;
1003
          wr = 1'b1;
1004
          psw_set = `OC8051_PS_NOT;
1005
          cy_sel = `OC8051_CY_0;
1006
          pc_wr = `OC8051_PCW_N;
1007
          pc_sel = `OC8051_PIS_DC;
1008
          imm_sel = `OC8051_IDS_DC;
1009
          src_sel3 = `OC8051_AS3_DC;
1010
          comp_sel = `OC8051_CSS_DC;
1011
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1012
          wad2 = `OC8051_WAD_N;
1013
          rom_addr_sel = `OC8051_RAS_PC;
1014
          ext_addr_sel = `OC8051_EAS_DC;
1015
        end
1016
      `OC8051_MOV_CR : begin
1017
          ram_rd_sel = `OC8051_RRS_DC;
1018
          ram_wr_sel = `OC8051_RWS_RN;
1019
          src_sel1 = `OC8051_ASS_IMM;
1020
          src_sel2 = `OC8051_ASS_DC;
1021
          alu_op = `OC8051_ALU_NOP;
1022
          wr = 1'b1;
1023
          psw_set = `OC8051_PS_NOT;
1024
          cy_sel = `OC8051_CY_0;
1025
          pc_wr = `OC8051_PCW_N;
1026
          pc_sel = `OC8051_PIS_DC;
1027
          imm_sel = `OC8051_IDS_OP2;
1028
          src_sel3 = `OC8051_AS3_DC;
1029
          comp_sel = `OC8051_CSS_DC;
1030
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1031
          wad2 = `OC8051_WAD_N;
1032
          rom_addr_sel = `OC8051_RAS_PC;
1033
          ext_addr_sel = `OC8051_EAS_DC;
1034
        end
1035
      `OC8051_MOV_RD : begin
1036
          ram_rd_sel = `OC8051_RRS_RN;
1037
          ram_wr_sel = `OC8051_RWS_D;
1038
          src_sel1 = `OC8051_ASS_RAM;
1039
          src_sel2 = `OC8051_ASS_DC;
1040
          alu_op = `OC8051_ALU_NOP;
1041
          wr = 1'b1;
1042
          psw_set = `OC8051_PS_NOT;
1043
          cy_sel = `OC8051_CY_0;
1044
          pc_wr = `OC8051_PCW_N;
1045
          pc_sel = `OC8051_PIS_DC;
1046
          imm_sel = `OC8051_IDS_DC;
1047
          src_sel3 = `OC8051_AS3_DC;
1048
          comp_sel = `OC8051_CSS_DC;
1049
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1050
          wad2 = `OC8051_WAD_N;
1051
          rom_addr_sel = `OC8051_RAS_PC;
1052
          ext_addr_sel = `OC8051_EAS_DC;
1053
        end
1054
      `OC8051_ORL_R : begin
1055
          ram_rd_sel = `OC8051_RRS_RN;
1056
          ram_wr_sel = `OC8051_RWS_ACC;
1057
          src_sel1 = `OC8051_ASS_RAM;
1058
          src_sel2 = `OC8051_ASS_ACC;
1059
          alu_op = `OC8051_ALU_OR;
1060
          wr = 1'b1;
1061
          psw_set = `OC8051_PS_NOT;
1062
          cy_sel = `OC8051_CY_0;
1063
          pc_wr = `OC8051_PCW_N;
1064
          pc_sel = `OC8051_PIS_DC;
1065
          imm_sel = `OC8051_IDS_DC;
1066
          src_sel3 = `OC8051_AS3_DC;
1067
          comp_sel = `OC8051_CSS_DC;
1068
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1069
          wad2 = `OC8051_WAD_N;
1070
          rom_addr_sel = `OC8051_RAS_PC;
1071
          ext_addr_sel = `OC8051_EAS_DC;
1072
        end
1073
      `OC8051_SUBB_R : begin
1074
          ram_rd_sel = `OC8051_RRS_RN;
1075
          ram_wr_sel = `OC8051_RWS_ACC;
1076
          src_sel1 = `OC8051_ASS_ACC;
1077
          src_sel2 = `OC8051_ASS_RAM;
1078
          alu_op = `OC8051_ALU_SUB;
1079
          wr = 1'b1;
1080
          psw_set = `OC8051_PS_AC;
1081
          cy_sel = `OC8051_CY_PSW;
1082
          pc_wr = `OC8051_PCW_N;
1083
          pc_sel = `OC8051_PIS_DC;
1084
          imm_sel = `OC8051_IDS_DC;
1085
          src_sel3 = `OC8051_AS3_DC;
1086
          comp_sel = `OC8051_CSS_DC;
1087
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1088
          wad2 = `OC8051_WAD_N;
1089
          rom_addr_sel = `OC8051_RAS_PC;
1090
          ext_addr_sel = `OC8051_EAS_DC;
1091
        end
1092
      `OC8051_XCH_R : begin
1093
          ram_rd_sel = `OC8051_RRS_RN;
1094
          ram_wr_sel = `OC8051_RWS_RN;
1095
          src_sel1 = `OC8051_ASS_RAM;
1096
          src_sel2 = `OC8051_ASS_ACC;
1097
          alu_op = `OC8051_ALU_XCH;
1098
          wr = 1'b1;
1099
          psw_set = `OC8051_PS_NOT;
1100
          cy_sel = `OC8051_CY_1;
1101
          pc_wr = `OC8051_PCW_N;
1102
          pc_sel = `OC8051_PIS_DC;
1103
          imm_sel = `OC8051_IDS_DC;
1104
          src_sel3 = `OC8051_AS3_DC;
1105
          comp_sel = `OC8051_CSS_DC;
1106
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1107
          wad2 = `OC8051_WAD_Y;
1108
          rom_addr_sel = `OC8051_RAS_PC;
1109
          ext_addr_sel = `OC8051_EAS_DC;
1110
        end
1111
      `OC8051_XRL_R : begin
1112
          ram_rd_sel = `OC8051_RRS_RN;
1113
          ram_wr_sel = `OC8051_RWS_ACC;
1114
          src_sel1 = `OC8051_ASS_RAM;
1115
          src_sel2 = `OC8051_ASS_ACC;
1116
          alu_op = `OC8051_ALU_XOR;
1117
          wr = 1'b1;
1118
          psw_set = `OC8051_PS_NOT;
1119
          cy_sel = `OC8051_CY_0;
1120
          pc_wr = `OC8051_PCW_N;
1121
          pc_sel = `OC8051_PIS_DC;
1122
          imm_sel = `OC8051_IDS_DC;
1123
          src_sel3 = `OC8051_AS3_DC;
1124
          comp_sel = `OC8051_CSS_DC;
1125
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1126
          wad2 = `OC8051_WAD_N;
1127
          rom_addr_sel = `OC8051_RAS_PC;
1128
          ext_addr_sel = `OC8051_EAS_DC;
1129
        end
1130
 
1131
//op_code [7:1]
1132
      `OC8051_ADD_I : begin
1133
          ram_rd_sel = `OC8051_RRS_I;
1134
          ram_wr_sel = `OC8051_RWS_ACC;
1135
          src_sel1 = `OC8051_ASS_ACC;
1136
          src_sel2 = `OC8051_ASS_RAM;
1137
          alu_op = `OC8051_ALU_ADD;
1138
          wr = 1'b1;
1139
          psw_set = `OC8051_PS_AC;
1140
          cy_sel = `OC8051_CY_0;
1141
          pc_wr = `OC8051_PCW_N;
1142
          pc_sel = `OC8051_PIS_DC;
1143
          imm_sel = `OC8051_IDS_DC;
1144
          src_sel3 = `OC8051_AS3_DC;
1145
          comp_sel = `OC8051_CSS_DC;
1146
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1147
          wad2 = `OC8051_WAD_N;
1148
          rom_addr_sel = `OC8051_RAS_PC;
1149
          ext_addr_sel = `OC8051_EAS_DC;
1150
        end
1151
      `OC8051_ADDC_I : begin
1152
          ram_rd_sel = `OC8051_RRS_I;
1153
          ram_wr_sel = `OC8051_RWS_ACC;
1154
          src_sel1 = `OC8051_ASS_ACC;
1155
          src_sel2 = `OC8051_ASS_RAM;
1156
          alu_op = `OC8051_ALU_ADD;
1157
          wr = 1'b1;
1158
          psw_set = `OC8051_PS_AC;
1159
          cy_sel = `OC8051_CY_PSW;
1160
          pc_wr = `OC8051_PCW_N;
1161
          pc_sel = `OC8051_PIS_DC;
1162
          imm_sel = `OC8051_IDS_DC;
1163
          src_sel3 = `OC8051_AS3_DC;
1164
          comp_sel = `OC8051_CSS_DC;
1165
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1166
          wad2 = `OC8051_WAD_N;
1167
          rom_addr_sel = `OC8051_RAS_PC;
1168
          ext_addr_sel = `OC8051_EAS_DC;
1169
        end
1170
      `OC8051_ANL_I : begin
1171
          ram_rd_sel = `OC8051_RRS_I;
1172
          ram_wr_sel = `OC8051_RWS_ACC;
1173
          src_sel1 = `OC8051_ASS_ACC;
1174
          src_sel2 = `OC8051_ASS_RAM;
1175
          alu_op = `OC8051_ALU_AND;
1176
          wr = 1'b1;
1177
          psw_set = `OC8051_PS_NOT;
1178
          cy_sel = `OC8051_CY_0;
1179
          pc_wr = `OC8051_PCW_N;
1180
          pc_sel = `OC8051_PIS_DC;
1181
          imm_sel = `OC8051_IDS_DC;
1182
          src_sel3 = `OC8051_AS3_DC;
1183
          comp_sel = `OC8051_CSS_DC;
1184
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1185
          wad2 = `OC8051_WAD_N;
1186
          rom_addr_sel = `OC8051_RAS_PC;
1187
          ext_addr_sel = `OC8051_EAS_DC;
1188
        end
1189
      `OC8051_CJNE_I : begin
1190
          ram_rd_sel = `OC8051_RRS_I;
1191
          ram_wr_sel = `OC8051_RWS_DC;
1192
          src_sel1 = `OC8051_ASS_RAM;
1193
          src_sel2 = `OC8051_ASS_IMM;
1194
          alu_op = `OC8051_ALU_SUB;
1195
          wr = 1'b0;
1196
          psw_set = `OC8051_PS_CY;
1197
          cy_sel = `OC8051_CY_0;
1198
          pc_wr = `OC8051_PCW_N;
1199
          pc_sel = `OC8051_PIS_DC;
1200
          imm_sel = `OC8051_IDS_OP2;
1201
          src_sel3 = `OC8051_AS3_DC;
1202
          comp_sel = `OC8051_CSS_DC;
1203
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1204
          wad2 = `OC8051_WAD_N;
1205
          rom_addr_sel = `OC8051_RAS_PC;
1206
          ext_addr_sel = `OC8051_EAS_DC;
1207
        end
1208
      `OC8051_DEC_I : begin
1209
          ram_rd_sel = `OC8051_RRS_I;
1210
          ram_wr_sel = `OC8051_RWS_I;
1211
          src_sel1 = `OC8051_ASS_RAM;
1212
          src_sel2 = `OC8051_ASS_ZERO;
1213
          alu_op = `OC8051_ALU_SUB;
1214
          wr = 1'b1;
1215
          psw_set = `OC8051_PS_NOT;
1216
          cy_sel = `OC8051_CY_1;
1217
          pc_wr = `OC8051_PCW_N;
1218
          pc_sel = `OC8051_PIS_DC;
1219
          imm_sel = `OC8051_IDS_DC;
1220
          src_sel3 = `OC8051_AS3_DC;
1221
          comp_sel = `OC8051_CSS_DC;
1222
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1223
          wad2 = `OC8051_WAD_N;
1224
          rom_addr_sel = `OC8051_RAS_PC;
1225
          ext_addr_sel = `OC8051_EAS_DC;
1226
        end
1227
      `OC8051_INC_I : begin
1228
          ram_rd_sel = `OC8051_RRS_I;
1229
          ram_wr_sel = `OC8051_RWS_I;
1230
          src_sel1 = `OC8051_ASS_RAM;
1231
          src_sel2 = `OC8051_ASS_ZERO;
1232
          alu_op = `OC8051_ALU_ADD;
1233
          wr = 1'b1;
1234
          psw_set = `OC8051_PS_NOT;
1235
          cy_sel = `OC8051_CY_1;
1236
          pc_wr = `OC8051_PCW_N;
1237
          pc_sel = `OC8051_PIS_DC;
1238
          imm_sel = `OC8051_IDS_DC;
1239
          src_sel3 = `OC8051_AS3_DC;
1240
          comp_sel = `OC8051_CSS_DC;
1241
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1242
          wad2 = `OC8051_WAD_N;
1243
          rom_addr_sel = `OC8051_RAS_PC;
1244
          ext_addr_sel = `OC8051_EAS_DC;
1245
        end
1246
      `OC8051_MOV_I : begin
1247
          ram_rd_sel = `OC8051_RRS_I;
1248
          ram_wr_sel = `OC8051_RWS_ACC;
1249
          src_sel1 = `OC8051_ASS_RAM;
1250
          src_sel2 = `OC8051_ASS_DC;
1251
          alu_op = `OC8051_ALU_NOP;
1252
          wr = 1'b1;
1253
          psw_set = `OC8051_PS_NOT;
1254
          cy_sel = `OC8051_CY_0;
1255
          pc_wr = `OC8051_PCW_N;
1256
          pc_sel = `OC8051_PIS_DC;
1257
          imm_sel = `OC8051_IDS_DC;
1258
          src_sel3 = `OC8051_AS3_DC;
1259
          comp_sel = `OC8051_CSS_DC;
1260
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1261
          wad2 = `OC8051_WAD_N;
1262
          rom_addr_sel = `OC8051_RAS_PC;
1263
          ext_addr_sel = `OC8051_EAS_DC;
1264
        end
1265
      `OC8051_MOV_ID : begin
1266
          ram_rd_sel = `OC8051_RRS_I;
1267
          ram_wr_sel = `OC8051_RWS_D;
1268
          src_sel1 = `OC8051_ASS_RAM;
1269
          src_sel2 = `OC8051_ASS_DC;
1270
          alu_op = `OC8051_ALU_NOP;
1271
          wr = 1'b1;
1272
          psw_set = `OC8051_PS_NOT;
1273
          cy_sel = `OC8051_CY_0;
1274
          pc_wr = `OC8051_PCW_N;
1275
          pc_sel = `OC8051_PIS_DC;
1276
          imm_sel = `OC8051_IDS_DC;
1277
          src_sel3 = `OC8051_AS3_DC;
1278
          comp_sel = `OC8051_CSS_DC;
1279
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1280
          wad2 = `OC8051_WAD_N;
1281
          rom_addr_sel = `OC8051_RAS_PC;
1282
          ext_addr_sel = `OC8051_EAS_DC;
1283
        end
1284
      `OC8051_MOV_AI : begin
1285
          ram_rd_sel = `OC8051_RRS_DC;
1286
          ram_wr_sel = `OC8051_RWS_I;
1287
          src_sel1 = `OC8051_ASS_ACC;
1288
          src_sel2 = `OC8051_ASS_DC;
1289
          alu_op = `OC8051_ALU_NOP;
1290
          wr = 1'b1;
1291
          psw_set = `OC8051_PS_NOT;
1292
          cy_sel = `OC8051_CY_0;
1293
          pc_wr = `OC8051_PCW_N;
1294
          pc_sel = `OC8051_PIS_DC;
1295
          imm_sel = `OC8051_IDS_DC;
1296
          src_sel3 = `OC8051_AS3_DC;
1297
          comp_sel = `OC8051_CSS_DC;
1298
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1299
          wad2 = `OC8051_WAD_N;
1300
          rom_addr_sel = `OC8051_RAS_PC;
1301
          ext_addr_sel = `OC8051_EAS_DC;
1302
        end
1303
      `OC8051_MOV_DI : begin
1304
          ram_rd_sel = `OC8051_RRS_D;
1305
          ram_wr_sel = `OC8051_RWS_I;
1306
          src_sel1 = `OC8051_ASS_RAM;
1307
          src_sel2 = `OC8051_ASS_DC;
1308
          alu_op = `OC8051_ALU_NOP;
1309
          wr = 1'b1;
1310
          psw_set = `OC8051_PS_NOT;
1311
          cy_sel = `OC8051_CY_0;
1312
          pc_wr = `OC8051_PCW_N;
1313
          pc_sel = `OC8051_PIS_DC;
1314
          imm_sel = `OC8051_IDS_DC;
1315
          src_sel3 = `OC8051_AS3_DC;
1316
          comp_sel = `OC8051_CSS_DC;
1317
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1318
          wad2 = `OC8051_WAD_N;
1319
          rom_addr_sel = `OC8051_RAS_PC;
1320
          ext_addr_sel = `OC8051_EAS_DC;
1321
        end
1322
      `OC8051_MOV_CI : begin
1323
          ram_rd_sel = `OC8051_RRS_DC;
1324
          ram_wr_sel = `OC8051_RWS_I;
1325
          src_sel1 = `OC8051_ASS_IMM;
1326
          src_sel2 = `OC8051_ASS_DC;
1327
          alu_op = `OC8051_ALU_NOP;
1328
          wr = 1'b1;
1329
          psw_set = `OC8051_PS_NOT;
1330
          cy_sel = `OC8051_CY_0;
1331
          pc_wr = `OC8051_PCW_N;
1332
          pc_sel = `OC8051_PIS_DC;
1333
          imm_sel = `OC8051_IDS_OP2;
1334
          src_sel3 = `OC8051_AS3_DC;
1335
          comp_sel = `OC8051_CSS_DC;
1336
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1337
          wad2 = `OC8051_WAD_N;
1338
          rom_addr_sel = `OC8051_RAS_PC;
1339
          ext_addr_sel = `OC8051_EAS_DC;
1340
        end
1341
      `OC8051_MOVX_IA : begin
1342
          ram_rd_sel = `OC8051_RRS_DC;
1343
          ram_wr_sel = `OC8051_RWS_ACC;
1344
          src_sel1 = `OC8051_ASS_XRAM;
1345
          src_sel2 = `OC8051_ASS_DC;
1346
          alu_op = `OC8051_ALU_NOP;
1347
          wr = 1'b1;
1348
          psw_set = `OC8051_PS_NOT;
1349
          cy_sel = `OC8051_CY_0;
1350
          pc_wr = `OC8051_PCW_N;
1351
          pc_sel = `OC8051_PIS_DC;
1352
          imm_sel = `OC8051_IDS_OP2;
1353
          src_sel3 = `OC8051_AS3_DC;
1354
          comp_sel = `OC8051_CSS_DC;
1355
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1356
          wad2 = `OC8051_WAD_N;
1357
          rom_addr_sel = `OC8051_RAS_PC;
1358
          ext_addr_sel = `OC8051_EAS_RI;
1359
        end
1360
      `OC8051_MOVX_AI :begin
1361
          ram_rd_sel = `OC8051_RRS_DC;
1362
          ram_wr_sel = `OC8051_RWS_ACC;
1363
          src_sel1 = `OC8051_ASS_DC;
1364
          src_sel2 = `OC8051_ASS_DC;
1365
          alu_op = `OC8051_ALU_NOP;
1366
          wr = 1'b0;
1367
          psw_set = `OC8051_PS_NOT;
1368
          cy_sel = `OC8051_CY_0;
1369
          pc_wr = `OC8051_PCW_N;
1370
          pc_sel = `OC8051_PIS_DC;
1371
          imm_sel = `OC8051_IDS_OP2;
1372
          src_sel3 = `OC8051_AS3_DC;
1373
          comp_sel = `OC8051_CSS_DC;
1374
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1375
          wad2 = `OC8051_WAD_N;
1376
          rom_addr_sel = `OC8051_RAS_PC;
1377
          ext_addr_sel = `OC8051_EAS_RI;
1378
        end
1379
      `OC8051_ORL_I : begin
1380
          ram_rd_sel = `OC8051_RRS_I;
1381
          ram_wr_sel = `OC8051_RWS_ACC;
1382
          src_sel1 = `OC8051_ASS_RAM;
1383
          src_sel2 = `OC8051_ASS_ACC;
1384
          alu_op = `OC8051_ALU_OR;
1385
          wr = 1'b1;
1386
          psw_set = `OC8051_PS_NOT;
1387
          cy_sel = `OC8051_CY_0;
1388
          pc_wr = `OC8051_PCW_N;
1389
          pc_sel = `OC8051_PIS_DC;
1390
          imm_sel = `OC8051_IDS_DC;
1391
          src_sel3 = `OC8051_AS3_DC;
1392
          comp_sel = `OC8051_CSS_DC;
1393
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1394
          wad2 = `OC8051_WAD_N;
1395
          rom_addr_sel = `OC8051_RAS_PC;
1396
          ext_addr_sel = `OC8051_EAS_DC;
1397
        end
1398
      `OC8051_SUBB_I : begin
1399
          ram_rd_sel = `OC8051_RRS_I;
1400
          ram_wr_sel = `OC8051_RWS_ACC;
1401
          src_sel1 = `OC8051_ASS_ACC;
1402
          src_sel2 = `OC8051_ASS_RAM;
1403
          alu_op = `OC8051_ALU_SUB;
1404
          wr = 1'b1;
1405
          psw_set = `OC8051_PS_AC;
1406
          cy_sel = `OC8051_CY_PSW;
1407
          pc_wr = `OC8051_PCW_N;
1408
          pc_sel = `OC8051_PIS_DC;
1409
          imm_sel = `OC8051_IDS_DC;
1410
          src_sel3 = `OC8051_AS3_DC;
1411
          comp_sel = `OC8051_CSS_DC;
1412
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1413
          wad2 = `OC8051_WAD_N;
1414
          rom_addr_sel = `OC8051_RAS_PC;
1415
          ext_addr_sel = `OC8051_EAS_DC;
1416
        end
1417
      `OC8051_XCH_I : begin
1418
          ram_rd_sel = `OC8051_RRS_I;
1419
          ram_wr_sel = `OC8051_RWS_I;
1420
          src_sel1 = `OC8051_ASS_RAM;
1421
          src_sel2 = `OC8051_ASS_ACC;
1422
          alu_op = `OC8051_ALU_XCH;
1423
          wr = 1'b1;
1424
          psw_set = `OC8051_PS_NOT;
1425
          cy_sel = `OC8051_CY_1;
1426
          pc_wr = `OC8051_PCW_N;
1427
          pc_sel = `OC8051_PIS_DC;
1428
          imm_sel = `OC8051_IDS_DC;
1429
          src_sel3 = `OC8051_AS3_DC;
1430
          comp_sel = `OC8051_CSS_DC;
1431
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1432
          wad2 = `OC8051_WAD_Y;
1433
          rom_addr_sel = `OC8051_RAS_PC;
1434
          ext_addr_sel = `OC8051_EAS_DC;
1435
        end
1436
      `OC8051_XCHD :begin
1437
          ram_rd_sel = `OC8051_RRS_I;
1438
          ram_wr_sel = `OC8051_RWS_I;
1439
          src_sel1 = `OC8051_ASS_RAM;
1440
          src_sel2 = `OC8051_ASS_ACC;
1441
          alu_op = `OC8051_ALU_XCH;
1442
          wr = 1'b1;
1443
          psw_set = `OC8051_PS_NOT;
1444
          cy_sel = `OC8051_CY_0;
1445
          pc_wr = `OC8051_PCW_N;
1446
          pc_sel = `OC8051_PIS_DC;
1447
          imm_sel = `OC8051_IDS_DC;
1448
          src_sel3 = `OC8051_AS3_DC;
1449
          comp_sel = `OC8051_CSS_DC;
1450
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1451
          wad2 = `OC8051_WAD_Y;
1452
          rom_addr_sel = `OC8051_RAS_PC;
1453
          ext_addr_sel = `OC8051_EAS_DC;
1454
        end
1455
      `OC8051_XRL_I : begin
1456
          ram_rd_sel = `OC8051_RRS_I;
1457
          ram_wr_sel = `OC8051_RWS_ACC;
1458
          src_sel1 = `OC8051_ASS_RAM;
1459
          src_sel2 = `OC8051_ASS_ACC;
1460
          alu_op = `OC8051_ALU_XOR;
1461
          wr = 1'b1;
1462
          psw_set = `OC8051_PS_NOT;
1463
          cy_sel = `OC8051_CY_0;
1464
          pc_wr = `OC8051_PCW_N;
1465
          pc_sel = `OC8051_PIS_DC;
1466
          imm_sel = `OC8051_IDS_DC;
1467
          src_sel3 = `OC8051_AS3_DC;
1468
          comp_sel = `OC8051_CSS_DC;
1469
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1470
          wad2 = `OC8051_WAD_N;
1471
          rom_addr_sel = `OC8051_RAS_PC;
1472
          ext_addr_sel = `OC8051_EAS_DC;
1473
        end
1474
 
1475
//op_code [7:0]
1476
      `OC8051_ADD_D : begin
1477
          ram_rd_sel = `OC8051_RRS_D;
1478
          ram_wr_sel = `OC8051_RWS_ACC;
1479
          src_sel1 = `OC8051_ASS_ACC;
1480
          src_sel2 = `OC8051_ASS_RAM;
1481
          alu_op = `OC8051_ALU_ADD;
1482
          wr = 1'b1;
1483
          psw_set = `OC8051_PS_AC;
1484
          cy_sel = `OC8051_CY_0;
1485
          pc_wr = `OC8051_PCW_N;
1486
          pc_sel = `OC8051_PIS_DC;
1487
          imm_sel = `OC8051_IDS_DC;
1488
          src_sel3 = `OC8051_AS3_DC;
1489
          comp_sel = `OC8051_CSS_DC;
1490
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1491
          wad2 = `OC8051_WAD_N;
1492
          rom_addr_sel = `OC8051_RAS_PC;
1493
          ext_addr_sel = `OC8051_EAS_DC;
1494
        end
1495
      `OC8051_ADD_C : begin
1496
          ram_rd_sel = `OC8051_RRS_DC;
1497
          ram_wr_sel = `OC8051_RWS_ACC;
1498
          src_sel1 = `OC8051_ASS_IMM;
1499
          src_sel2 = `OC8051_ASS_ACC;
1500
          alu_op = `OC8051_ALU_ADD;
1501
          wr = 1'b1;
1502
          psw_set = `OC8051_PS_AC;
1503
          cy_sel = `OC8051_CY_0;
1504
          pc_wr = `OC8051_PCW_N;
1505
          pc_sel = `OC8051_PIS_DC;
1506
          imm_sel = `OC8051_IDS_OP2;
1507
          src_sel3 = `OC8051_AS3_DC;
1508
          comp_sel = `OC8051_CSS_DC;
1509
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1510
          wad2 = `OC8051_WAD_N;
1511
          rom_addr_sel = `OC8051_RAS_PC;
1512
          ext_addr_sel = `OC8051_EAS_DC;
1513
        end
1514
      `OC8051_ADDC_D : begin
1515
          ram_rd_sel = `OC8051_RRS_D;
1516
          ram_wr_sel = `OC8051_RWS_ACC;
1517
          src_sel1 = `OC8051_ASS_ACC;
1518
          src_sel2 = `OC8051_ASS_RAM;
1519
          alu_op = `OC8051_ALU_ADD;
1520
          wr = 1'b1;
1521
          psw_set = `OC8051_PS_AC;
1522
          cy_sel = `OC8051_CY_PSW;
1523
          pc_wr = `OC8051_PCW_N;
1524
          pc_sel = `OC8051_PIS_DC;
1525
          imm_sel = `OC8051_IDS_DC;
1526
          src_sel3 = `OC8051_AS3_DC;
1527
          comp_sel = `OC8051_CSS_DC;
1528
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1529
          wad2 = `OC8051_WAD_N;
1530
          rom_addr_sel = `OC8051_RAS_PC;
1531
          ext_addr_sel = `OC8051_EAS_DC;
1532
        end
1533
      `OC8051_ADDC_C : begin
1534
          ram_rd_sel = `OC8051_RRS_DC;
1535
          ram_wr_sel = `OC8051_RWS_ACC;
1536
          src_sel1 = `OC8051_ASS_IMM;
1537
          src_sel2 = `OC8051_ASS_ACC;
1538
          alu_op = `OC8051_ALU_ADD;
1539
          wr = 1'b1;
1540
          psw_set = `OC8051_PS_AC;
1541
          cy_sel = `OC8051_CY_PSW;
1542
          pc_wr = `OC8051_PCW_N;
1543
          pc_sel = `OC8051_PIS_DC;
1544
          imm_sel = `OC8051_IDS_OP2;
1545
          src_sel3 = `OC8051_AS3_DC;
1546
          comp_sel = `OC8051_CSS_DC;
1547
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1548
          wad2 = `OC8051_WAD_N;
1549
          rom_addr_sel = `OC8051_RAS_PC;
1550
          ext_addr_sel = `OC8051_EAS_DC;
1551
        end
1552
      `OC8051_ANL_D : begin
1553
          ram_rd_sel = `OC8051_RRS_D;
1554
          ram_wr_sel = `OC8051_RWS_ACC;
1555
          src_sel1 = `OC8051_ASS_ACC;
1556
          src_sel2 = `OC8051_ASS_RAM;
1557
          alu_op = `OC8051_ALU_AND;
1558
          wr = 1'b1;
1559
          psw_set = `OC8051_PS_NOT;
1560
          cy_sel = `OC8051_CY_0;
1561
          pc_wr = `OC8051_PCW_N;
1562
          pc_sel = `OC8051_PIS_DC;
1563
          imm_sel = `OC8051_IDS_DC;
1564
          src_sel3 = `OC8051_AS3_DC;
1565
          comp_sel = `OC8051_CSS_DC;
1566
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1567
          wad2 = `OC8051_WAD_N;
1568
          rom_addr_sel = `OC8051_RAS_PC;
1569
          ext_addr_sel = `OC8051_EAS_DC;
1570
        end
1571
      `OC8051_ANL_C : begin
1572
          ram_rd_sel = `OC8051_RRS_DC;
1573
          ram_wr_sel = `OC8051_RWS_ACC;
1574
          src_sel1 = `OC8051_ASS_IMM;
1575
          src_sel2 = `OC8051_ASS_ACC;
1576
          alu_op = `OC8051_ALU_AND;
1577
          wr = 1'b1;
1578
          psw_set = `OC8051_PS_NOT;
1579
          cy_sel = `OC8051_CY_0;
1580
          pc_wr = `OC8051_PCW_N;
1581
          pc_sel = `OC8051_PIS_DC;
1582
          imm_sel = `OC8051_IDS_OP2;
1583
          src_sel3 = `OC8051_AS3_DC;
1584
          comp_sel = `OC8051_CSS_DC;
1585
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1586
          wad2 = `OC8051_WAD_N;
1587
          rom_addr_sel = `OC8051_RAS_PC;
1588
          ext_addr_sel = `OC8051_EAS_DC;
1589
        end
1590
      `OC8051_ANL_DD : begin
1591
          ram_rd_sel = `OC8051_RRS_D;
1592
          ram_wr_sel = `OC8051_RWS_D;
1593
          src_sel1 = `OC8051_ASS_ACC;
1594
          src_sel2 = `OC8051_ASS_RAM;
1595
          alu_op = `OC8051_ALU_AND;
1596
          wr = 1'b1;
1597
          psw_set = `OC8051_PS_NOT;
1598
          cy_sel = `OC8051_CY_0;
1599
          pc_wr = `OC8051_PCW_N;
1600
          pc_sel = `OC8051_PIS_DC;
1601
          imm_sel = `OC8051_IDS_DC;
1602
          src_sel3 = `OC8051_AS3_DC;
1603
          comp_sel = `OC8051_CSS_DC;
1604
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1605
          wad2 = `OC8051_WAD_N;
1606
          rom_addr_sel = `OC8051_RAS_PC;
1607
          ext_addr_sel = `OC8051_EAS_DC;
1608
        end
1609
      `OC8051_ANL_DC : begin
1610
          ram_rd_sel = `OC8051_RRS_D;
1611
          ram_wr_sel = `OC8051_RWS_D;
1612
          src_sel1 = `OC8051_ASS_IMM;
1613
          src_sel2 = `OC8051_ASS_RAM;
1614
          alu_op = `OC8051_ALU_AND;
1615
          wr = 1'b1;
1616
          psw_set = `OC8051_PS_NOT;
1617
          cy_sel = `OC8051_CY_0;
1618
          pc_wr = `OC8051_PCW_N;
1619
          pc_sel = `OC8051_PIS_DC;
1620
          imm_sel = `OC8051_IDS_OP3;
1621
          src_sel3 = `OC8051_AS3_DC;
1622
          comp_sel = `OC8051_CSS_DC;
1623
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1624
          wad2 = `OC8051_WAD_N;
1625
          rom_addr_sel = `OC8051_RAS_PC;
1626
          ext_addr_sel = `OC8051_EAS_DC;
1627
        end
1628
      `OC8051_ANL_B : begin
1629
          ram_rd_sel = `OC8051_RRS_D;
1630
          ram_wr_sel = `OC8051_RWS_DC;
1631
          src_sel1 = `OC8051_ASS_DC;
1632
          src_sel2 = `OC8051_ASS_DC;
1633
          alu_op = `OC8051_ALU_AND;
1634
          wr = 1'b0;
1635
          psw_set = `OC8051_PS_CY;
1636
          cy_sel = `OC8051_CY_PSW;
1637
          pc_wr = `OC8051_PCW_N;
1638
          pc_sel = `OC8051_PIS_DC;
1639
          imm_sel = `OC8051_IDS_DC;
1640
          src_sel3 = `OC8051_AS3_DC;
1641
          comp_sel = `OC8051_CSS_DC;
1642
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b1;
1643
          wad2 = `OC8051_WAD_N;
1644
          rom_addr_sel = `OC8051_RAS_PC;
1645
          ext_addr_sel = `OC8051_EAS_DC;
1646
        end
1647
      `OC8051_ANL_NB : begin
1648
          ram_rd_sel = `OC8051_RRS_D;
1649
          ram_wr_sel = `OC8051_RWS_DC;
1650
          src_sel1 = `OC8051_ASS_DC;
1651
          src_sel2 = `OC8051_ASS_DC;
1652
          alu_op = `OC8051_ALU_RR;
1653
          wr = 1'b0;
1654
          psw_set = `OC8051_PS_CY;
1655
          cy_sel = `OC8051_CY_PSW;
1656
          pc_wr = `OC8051_PCW_N;
1657
          pc_sel = `OC8051_PIS_DC;
1658
          imm_sel = `OC8051_IDS_DC;
1659
          src_sel3 = `OC8051_AS3_DC;
1660
          comp_sel = `OC8051_CSS_DC;
1661
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b1;
1662
          wad2 = `OC8051_WAD_N;
1663
          rom_addr_sel = `OC8051_RAS_PC;
1664
          ext_addr_sel = `OC8051_EAS_DC;
1665
        end
1666
      `OC8051_CJNE_D : begin
1667
          ram_rd_sel = `OC8051_RRS_D;
1668
          ram_wr_sel = `OC8051_RWS_DC;
1669
          src_sel1 = `OC8051_ASS_ACC;
1670
          src_sel2 = `OC8051_ASS_RAM;
1671
          alu_op = `OC8051_ALU_SUB;
1672
          wr = 1'b0;
1673
          psw_set = `OC8051_PS_CY;
1674
          cy_sel = `OC8051_CY_0;
1675
          pc_wr = `OC8051_PCW_N;
1676
          pc_sel = `OC8051_PIS_DC;
1677
          imm_sel = `OC8051_IDS_DC;
1678
          src_sel3 = `OC8051_AS3_DC;
1679
          comp_sel = `OC8051_CSS_DC;
1680
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1681
          wad2 = `OC8051_WAD_N;
1682
          rom_addr_sel = `OC8051_RAS_PC;
1683
          ext_addr_sel = `OC8051_EAS_DC;
1684
        end
1685
      `OC8051_CJNE_C : begin
1686
          ram_rd_sel = `OC8051_RRS_DC;
1687
          ram_wr_sel = `OC8051_RWS_DC;
1688
          src_sel1 = `OC8051_ASS_ACC;
1689
          src_sel2 = `OC8051_ASS_IMM;
1690
          alu_op = `OC8051_ALU_SUB;
1691
          wr = 1'b0;
1692
          psw_set = `OC8051_PS_CY;
1693
          cy_sel = `OC8051_CY_0;
1694
          pc_wr = `OC8051_PCW_N;
1695
          pc_sel = `OC8051_PIS_DC;
1696
          imm_sel = `OC8051_IDS_OP2;
1697
          src_sel3 = `OC8051_AS3_DC;
1698
          comp_sel = `OC8051_CSS_DC;
1699
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1700
          wad2 = `OC8051_WAD_N;
1701
          rom_addr_sel = `OC8051_RAS_PC;
1702
          ext_addr_sel = `OC8051_EAS_DC;
1703
        end
1704
      `OC8051_CLR_A : begin
1705
          ram_rd_sel = `OC8051_RRS_DC;
1706
          ram_wr_sel = `OC8051_RWS_ACC;
1707
          src_sel1 = `OC8051_ASS_ACC;
1708
          src_sel2 = `OC8051_ASS_ACC;
1709
          alu_op = `OC8051_ALU_SUB;
1710
          wr = 1'b1;
1711
          psw_set = `OC8051_PS_NOT;
1712
          cy_sel = `OC8051_CY_0;
1713
          pc_wr = `OC8051_PCW_N;
1714
          pc_sel = `OC8051_PIS_DC;
1715
          imm_sel = `OC8051_IDS_DC;
1716
          src_sel3 = `OC8051_AS3_PC;
1717
          comp_sel = `OC8051_CSS_DC;
1718
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1719
          wad2 = `OC8051_WAD_N;
1720
          rom_addr_sel = `OC8051_RAS_PC;
1721
          ext_addr_sel = `OC8051_EAS_DC;
1722
        end
1723
      `OC8051_CLR_C : begin
1724
          ram_rd_sel = `OC8051_RRS_DC;
1725
          ram_wr_sel = `OC8051_RWS_DC;
1726
          src_sel1 = `OC8051_ASS_DC;
1727
          src_sel2 = `OC8051_ASS_DC;
1728
          alu_op = `OC8051_ALU_NOP;
1729
          wr = 1'b0;
1730
          psw_set = `OC8051_PS_CY;
1731
          cy_sel = `OC8051_CY_0;
1732
          pc_wr = `OC8051_PCW_N;
1733
          pc_sel = `OC8051_PIS_DC;
1734
          imm_sel = `OC8051_IDS_DC;
1735
          src_sel3 = `OC8051_AS3_PC;
1736
          comp_sel = `OC8051_CSS_DC;
1737
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1738
          wad2 = `OC8051_WAD_N;
1739
          rom_addr_sel = `OC8051_RAS_PC;
1740
          ext_addr_sel = `OC8051_EAS_DC;
1741
        end
1742
      `OC8051_CLR_B : begin
1743
          ram_rd_sel = `OC8051_RRS_D;
1744
          ram_wr_sel = `OC8051_RWS_D;
1745
          src_sel1 = `OC8051_ASS_DC;
1746
          src_sel2 = `OC8051_ASS_DC;
1747
          alu_op = `OC8051_ALU_NOP;
1748
          wr = 1'b1;
1749
          psw_set = `OC8051_PS_NOT;
1750
          cy_sel = `OC8051_CY_0;
1751
          pc_wr = `OC8051_PCW_N;
1752
          pc_sel = `OC8051_PIS_DC;
1753
          imm_sel = `OC8051_IDS_DC;
1754
          src_sel3 = `OC8051_AS3_PC;
1755
          comp_sel = `OC8051_CSS_DC;
1756
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b1;
1757
          wad2 = `OC8051_WAD_N;
1758
          rom_addr_sel = `OC8051_RAS_PC;
1759
          ext_addr_sel = `OC8051_EAS_DC;
1760
        end
1761
      `OC8051_CPL_A : begin
1762
          ram_rd_sel = `OC8051_RRS_DC;
1763
          ram_wr_sel = `OC8051_RWS_ACC;
1764
          src_sel1 = `OC8051_ASS_ACC;
1765
          src_sel2 = `OC8051_ASS_DC;
1766
          alu_op = `OC8051_ALU_NOT;
1767
          wr = 1'b1;
1768
          psw_set = `OC8051_PS_NOT;
1769
          cy_sel = `OC8051_CY_0;
1770
          pc_wr = `OC8051_PCW_N;
1771
          pc_sel = `OC8051_PIS_DC;
1772
          imm_sel = `OC8051_IDS_OP3;   ///****
1773
          src_sel3 = `OC8051_AS3_DC;
1774
          comp_sel = `OC8051_CSS_DC;
1775
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1776
          wad2 = `OC8051_WAD_N;
1777
          rom_addr_sel = `OC8051_RAS_PC;
1778
          ext_addr_sel = `OC8051_EAS_DC;
1779
        end
1780
      `OC8051_CPL_C : begin
1781
          ram_rd_sel = `OC8051_RRS_DC;
1782
          ram_wr_sel = `OC8051_RWS_DC;
1783
          src_sel1 = `OC8051_ASS_DC;
1784
          src_sel2 = `OC8051_ASS_DC;
1785
          alu_op = `OC8051_ALU_NOT;
1786
          wr = 1'b0;
1787
          psw_set = `OC8051_PS_CY;
1788
          cy_sel = `OC8051_CY_PSW;
1789
          pc_wr = `OC8051_PCW_N;
1790
          pc_sel = `OC8051_PIS_DC;
1791
          imm_sel = `OC8051_IDS_OP3;  ///*****
1792
          src_sel3 = `OC8051_AS3_DC;
1793
          comp_sel = `OC8051_CSS_DC;
1794
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1795
          wad2 = `OC8051_WAD_N;
1796
          rom_addr_sel = `OC8051_RAS_PC;
1797
          ext_addr_sel = `OC8051_EAS_DC;
1798
        end
1799
      `OC8051_CPL_B : begin
1800
          ram_rd_sel = `OC8051_RRS_D;
1801
          ram_wr_sel = `OC8051_RWS_D;
1802
          src_sel1 = `OC8051_ASS_DC;
1803
          src_sel2 = `OC8051_ASS_DC;
1804
          alu_op = `OC8051_ALU_NOT;
1805
          wr = 1'b1;
1806
          psw_set = `OC8051_PS_NOT;
1807
          cy_sel = `OC8051_CY_RAM;
1808
          pc_wr = `OC8051_PCW_N;
1809
          pc_sel = `OC8051_PIS_DC;
1810
          imm_sel = `OC8051_IDS_OP3;  ///***
1811
          src_sel3 = `OC8051_AS3_DC;
1812
          comp_sel = `OC8051_CSS_DC;
1813
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b1;
1814
          wad2 = `OC8051_WAD_N;
1815
          rom_addr_sel = `OC8051_RAS_PC;
1816
          ext_addr_sel = `OC8051_EAS_DC;
1817
        end
1818
      `OC8051_DA : begin
1819
          ram_rd_sel = `OC8051_RRS_DC;
1820
          ram_wr_sel = `OC8051_RWS_ACC;
1821
          src_sel1 = `OC8051_ASS_ACC;
1822
          src_sel2 = `OC8051_ASS_DC;
1823
          alu_op = `OC8051_ALU_DA;
1824
          wr = 1'b1;
1825
          psw_set = `OC8051_PS_CY;
1826
          cy_sel = `OC8051_CY_PSW;
1827
          pc_wr = `OC8051_PCW_N;
1828
          pc_sel = `OC8051_PIS_DC;
1829
          imm_sel = `OC8051_IDS_DC;
1830
          src_sel3 = `OC8051_AS3_DC;
1831
          comp_sel = `OC8051_CSS_DC;
1832
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1833
          wad2 = `OC8051_WAD_N;
1834
          rom_addr_sel = `OC8051_RAS_PC;
1835
          ext_addr_sel = `OC8051_EAS_DC;
1836
        end
1837
      `OC8051_DEC_A : begin
1838
          ram_rd_sel = `OC8051_RRS_DC;
1839
          ram_wr_sel = `OC8051_RWS_ACC;
1840
          src_sel1 = `OC8051_ASS_ACC;
1841
          src_sel2 = `OC8051_ASS_ZERO;
1842
          alu_op = `OC8051_ALU_SUB;
1843
          wr = 1'b1;
1844
          psw_set = `OC8051_PS_NOT;
1845
          cy_sel = `OC8051_CY_1;
1846
          pc_wr = `OC8051_PCW_N;
1847
          pc_sel = `OC8051_PIS_DC;
1848
          imm_sel = `OC8051_IDS_DC;
1849
          src_sel3 = `OC8051_AS3_DC;
1850
          comp_sel = `OC8051_CSS_DC;
1851
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1852
          wad2 = `OC8051_WAD_N;
1853
          rom_addr_sel = `OC8051_RAS_PC;
1854
          ext_addr_sel = `OC8051_EAS_DC;
1855
        end
1856
      `OC8051_DEC_D : begin
1857
          ram_rd_sel = `OC8051_RRS_D;
1858
          ram_wr_sel = `OC8051_RWS_D;
1859
          src_sel1 = `OC8051_ASS_RAM;
1860
          src_sel2 = `OC8051_ASS_ZERO;
1861
          alu_op = `OC8051_ALU_SUB;
1862
          wr = 1'b1;
1863
          psw_set = `OC8051_PS_NOT;
1864
          cy_sel = `OC8051_CY_1;
1865
          pc_wr = `OC8051_PCW_N;
1866
          pc_sel = `OC8051_PIS_DC;
1867
          imm_sel = `OC8051_IDS_DC;
1868
          src_sel3 = `OC8051_AS3_DC;
1869
          comp_sel = `OC8051_CSS_DC;
1870
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1871
          wad2 = `OC8051_WAD_N;
1872
          rom_addr_sel = `OC8051_RAS_PC;
1873
          ext_addr_sel = `OC8051_EAS_DC;
1874
        end
1875
      `OC8051_DIV : begin
1876
          ram_rd_sel = `OC8051_RRS_D;
1877
          ram_wr_sel = `OC8051_RWS_B;
1878
          src_sel1 = `OC8051_ASS_ACC;
1879
          src_sel2 = `OC8051_ASS_RAM;
1880
          alu_op = `OC8051_ALU_DIV;
1881
          wr = 1'b1;
1882
          psw_set = `OC8051_PS_OV;
1883
          cy_sel = `OC8051_CY_0;
1884
          pc_wr = `OC8051_PCW_N;
1885
          pc_sel = `OC8051_PIS_DC;
1886
          imm_sel = `OC8051_IDS_DC;
1887
          src_sel3 = `OC8051_AS3_DC;
1888
          comp_sel = `OC8051_CSS_DC;
1889
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
1890
          wad2 = `OC8051_WAD_Y;
1891
          rom_addr_sel = `OC8051_RAS_PC;
1892
          ext_addr_sel = `OC8051_EAS_DC;
1893
        end
1894
      `OC8051_DJNZ_D : begin
1895
          ram_rd_sel = `OC8051_RRS_D;
1896
          ram_wr_sel = `OC8051_RWS_D;
1897
          src_sel1 = `OC8051_ASS_RAM;
1898
          src_sel2 = `OC8051_ASS_ZERO;
1899
          alu_op = `OC8051_ALU_SUB;
1900
          wr = 1'b1;
1901
          psw_set = `OC8051_PS_NOT;
1902
          cy_sel = `OC8051_CY_1;
1903
          pc_wr = `OC8051_PCW_N;
1904
          pc_sel = `OC8051_PIS_DC;
1905
          imm_sel = `OC8051_IDS_DC;
1906
          src_sel3 = `OC8051_AS3_DC;
1907
          comp_sel = `OC8051_CSS_DC;
1908
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1909
          wad2 = `OC8051_WAD_N;
1910
          rom_addr_sel = `OC8051_RAS_PC;
1911
          ext_addr_sel = `OC8051_EAS_DC;
1912
        end
1913
      `OC8051_INC_A : begin
1914
          ram_rd_sel = `OC8051_RRS_DC;
1915
          ram_wr_sel = `OC8051_RWS_ACC;
1916
          src_sel1 = `OC8051_ASS_ACC;
1917
          src_sel2 = `OC8051_ASS_ZERO;
1918
          alu_op = `OC8051_ALU_ADD;
1919
          wr = 1'b1;
1920
          psw_set = `OC8051_PS_NOT;
1921
          cy_sel = `OC8051_CY_1;
1922
          pc_wr = `OC8051_PCW_N;
1923
          pc_sel = `OC8051_PIS_DC;
1924
          imm_sel = `OC8051_IDS_DC;
1925
          src_sel3 = `OC8051_AS3_DC;
1926
          comp_sel = `OC8051_CSS_DC;
1927
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1928
          wad2 = `OC8051_WAD_N;
1929
          rom_addr_sel = `OC8051_RAS_PC;
1930
          ext_addr_sel = `OC8051_EAS_DC;
1931
        end
1932
      `OC8051_INC_D : begin
1933
          ram_rd_sel = `OC8051_RRS_D;
1934
          ram_wr_sel = `OC8051_RWS_D;
1935
          src_sel1 = `OC8051_ASS_RAM;
1936
          src_sel2 = `OC8051_ASS_ZERO;
1937
          alu_op = `OC8051_ALU_ADD;
1938
          wr = 1'b1;
1939
          psw_set = `OC8051_PS_NOT;
1940
          cy_sel = `OC8051_CY_1;
1941
          pc_wr = `OC8051_PCW_N;
1942
          pc_sel = `OC8051_PIS_DC;
1943
          imm_sel = `OC8051_IDS_DC;
1944
          src_sel3 = `OC8051_AS3_DC;
1945
          comp_sel = `OC8051_CSS_DC;
1946
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1947
          wad2 = `OC8051_WAD_N;
1948
          rom_addr_sel = `OC8051_RAS_PC;
1949
          ext_addr_sel = `OC8051_EAS_DC;
1950
        end
1951
      `OC8051_INC_DP : begin
1952
          ram_rd_sel = `OC8051_RRS_D;
1953
          ram_wr_sel = `OC8051_RWS_DPTR;
1954
          src_sel1 = `OC8051_ASS_RAM;
1955
          src_sel2 = `OC8051_ASS_ZERO;
1956
          alu_op = `OC8051_ALU_ADD;
1957
          wr = 1'b1;
1958
          psw_set = `OC8051_PS_NOT;
1959
          cy_sel = `OC8051_CY_1;
1960
          pc_wr = `OC8051_PCW_N;
1961
          pc_sel = `OC8051_PIS_DC;
1962
          imm_sel = `OC8051_IDS_DC;
1963
          src_sel3 = `OC8051_AS3_DP;
1964
          comp_sel = `OC8051_CSS_DC;
1965
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
1966
          wad2 = `OC8051_WAD_N;
1967
          rom_addr_sel = `OC8051_RAS_PC;
1968
          ext_addr_sel = `OC8051_EAS_DC;
1969
        end
1970
      `OC8051_JB : begin
1971
          ram_rd_sel = `OC8051_RRS_D;
1972
          ram_wr_sel = `OC8051_RWS_DC;
1973
          src_sel1 = `OC8051_ASS_IMM;
1974
          src_sel2 = `OC8051_ASS_IMM;
1975
          alu_op = `OC8051_ALU_PCS;
1976
          wr = 1'b0;
1977
          psw_set = `OC8051_PS_NOT;
1978
          cy_sel = `OC8051_CY_0;
1979
          pc_wr = `OC8051_PCW_N;
1980
          pc_sel = `OC8051_PIS_DC;
1981
          imm_sel = `OC8051_IDS_OP3_PCL;
1982
          src_sel3 = `OC8051_AS3_PC;
1983
          comp_sel = `OC8051_CSS_BIT;
1984
          rmw = `OC8051_RMW_N;        bit_addr = 1'b1;
1985
          wad2 = `OC8051_WAD_N;
1986
          rom_addr_sel = `OC8051_RAS_PC;
1987
          ext_addr_sel = `OC8051_EAS_DC;
1988
        end
1989
      `OC8051_JBC :begin
1990
          ram_rd_sel = `OC8051_RRS_D;
1991
          ram_wr_sel = `OC8051_RWS_DC;
1992
          src_sel1 = `OC8051_ASS_IMM;
1993
          src_sel2 = `OC8051_ASS_IMM;
1994
          alu_op = `OC8051_ALU_PCS;
1995
          wr = 1'b0;
1996
          psw_set = `OC8051_PS_NOT;
1997
          cy_sel = `OC8051_CY_0;
1998
          pc_wr = `OC8051_PCW_N;
1999
          pc_sel = `OC8051_PIS_DC;
2000
          imm_sel = `OC8051_IDS_OP3_PCL;
2001
          src_sel3 = `OC8051_AS3_PC;
2002
          comp_sel = `OC8051_CSS_BIT;
2003
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b1;
2004
          wad2 = `OC8051_WAD_N;
2005
          rom_addr_sel = `OC8051_RAS_PC;
2006
          ext_addr_sel = `OC8051_EAS_DC;
2007
        end
2008
      `OC8051_JC : begin
2009
          ram_rd_sel = `OC8051_RRS_DC;
2010
          ram_wr_sel = `OC8051_RWS_DC;
2011
          src_sel1 = `OC8051_ASS_IMM;
2012
          src_sel2 = `OC8051_ASS_IMM;
2013
          alu_op = `OC8051_ALU_PCS;
2014
          wr = 1'b0;
2015
          psw_set = `OC8051_PS_NOT;
2016
          cy_sel = `OC8051_CY_0;
2017
          pc_wr = `OC8051_PCW_N;
2018
          pc_sel = `OC8051_PIS_DC;
2019
          imm_sel = `OC8051_IDS_OP2_PCL;
2020
          src_sel3 = `OC8051_AS3_PC;
2021
          comp_sel = `OC8051_CSS_CY;
2022
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2023
          wad2 = `OC8051_WAD_N;
2024
          rom_addr_sel = `OC8051_RAS_PC;
2025
          ext_addr_sel = `OC8051_EAS_DC;
2026
        end
2027
      `OC8051_JMP : begin
2028
          ram_rd_sel = `OC8051_RRS_D;
2029
          ram_wr_sel = `OC8051_RWS_DC;
2030
          src_sel1 = `OC8051_ASS_ACC;
2031
          src_sel2 = `OC8051_ASS_RAM;
2032
          alu_op = `OC8051_ALU_ADD;
2033
          wr = 1'b0;
2034
          psw_set = `OC8051_PS_NOT;
2035
          cy_sel = `OC8051_CY_0;
2036
          pc_wr = `OC8051_PCW_N;
2037
          pc_sel = `OC8051_PIS_DC;
2038
          imm_sel = `OC8051_IDS_DC;
2039
          src_sel3 = `OC8051_AS3_DP;
2040
          comp_sel = `OC8051_CSS_BIT;
2041
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2042
          wad2 = `OC8051_WAD_N;
2043
          rom_addr_sel = `OC8051_RAS_PC;
2044
          ext_addr_sel = `OC8051_EAS_DC;
2045
        end
2046
      `OC8051_JNB : begin
2047
          ram_rd_sel = `OC8051_RRS_D;
2048
          ram_wr_sel = `OC8051_RWS_DC;
2049
          src_sel1 = `OC8051_ASS_IMM;
2050
          src_sel2 = `OC8051_ASS_IMM;
2051
          alu_op = `OC8051_ALU_PCS;
2052
          wr = 1'b0;
2053
          psw_set = `OC8051_PS_NOT;
2054
          cy_sel = `OC8051_CY_0;
2055
          pc_wr = `OC8051_PCW_N;
2056
          pc_sel = `OC8051_PIS_DC;
2057
          imm_sel = `OC8051_IDS_OP3_PCL;
2058
          src_sel3 = `OC8051_AS3_PC;
2059
          comp_sel = `OC8051_CSS_BIT;
2060
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2061
          wad2 = `OC8051_WAD_N;
2062
          rom_addr_sel = `OC8051_RAS_PC;
2063
          ext_addr_sel = `OC8051_EAS_DC;
2064
        end
2065
      `OC8051_JNC : begin
2066
          ram_rd_sel = `OC8051_RRS_DC;
2067
          ram_wr_sel = `OC8051_RWS_DC;
2068
          src_sel1 = `OC8051_ASS_IMM;
2069
          src_sel2 = `OC8051_ASS_IMM;
2070
          alu_op = `OC8051_ALU_PCS;
2071
          wr = 1'b0;
2072
          psw_set = `OC8051_PS_NOT;
2073
          cy_sel = `OC8051_CY_0;
2074
          pc_wr = `OC8051_PCW_N;
2075
          pc_sel = `OC8051_PIS_DC;
2076
          imm_sel = `OC8051_IDS_OP2_PCL;
2077
          src_sel3 = `OC8051_AS3_PC;
2078
          comp_sel = `OC8051_CSS_CY;
2079
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2080
          wad2 = `OC8051_WAD_N;
2081
          rom_addr_sel = `OC8051_RAS_PC;
2082
          ext_addr_sel = `OC8051_EAS_DC;
2083
        end
2084
      `OC8051_JNZ :begin
2085
          ram_rd_sel = `OC8051_RRS_DC;
2086
          ram_wr_sel = `OC8051_RWS_DC;
2087
          src_sel1 = `OC8051_ASS_IMM;
2088
          src_sel2 = `OC8051_ASS_IMM;
2089
          alu_op = `OC8051_ALU_PCS;
2090
          wr = 1'b0;
2091
          psw_set = `OC8051_PS_NOT;
2092
          cy_sel = `OC8051_CY_0;
2093
          pc_wr = `OC8051_PCW_N;
2094
          pc_sel = `OC8051_PIS_DC;
2095
          imm_sel = `OC8051_IDS_OP2_PCL;
2096
          src_sel3 = `OC8051_AS3_PC;
2097
          comp_sel = `OC8051_CSS_AZ;
2098
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2099
          wad2 = `OC8051_WAD_N;
2100
          rom_addr_sel = `OC8051_RAS_PC;
2101
          ext_addr_sel = `OC8051_EAS_DC;
2102
        end
2103
      `OC8051_JZ : begin
2104
          ram_rd_sel = `OC8051_RRS_DC;
2105
          ram_wr_sel = `OC8051_RWS_DC;
2106
          src_sel1 = `OC8051_ASS_IMM;
2107
          src_sel2 = `OC8051_ASS_IMM;
2108
          alu_op = `OC8051_ALU_PCS;
2109
          wr = 1'b0;
2110
          psw_set = `OC8051_PS_NOT;
2111
          cy_sel = `OC8051_CY_0;
2112
          pc_wr = `OC8051_PCW_N;
2113
          pc_sel = `OC8051_PIS_DC;
2114
          imm_sel = `OC8051_IDS_OP2_PCL;
2115
          src_sel3 = `OC8051_AS3_PC;
2116
          comp_sel = `OC8051_CSS_AZ;
2117
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2118
          wad2 = `OC8051_WAD_N;
2119
          rom_addr_sel = `OC8051_RAS_PC;
2120
          ext_addr_sel = `OC8051_EAS_DC;
2121
        end
2122
      `OC8051_LCALL :begin
2123
          ram_rd_sel = `OC8051_RRS_DC;
2124
          ram_wr_sel = `OC8051_RWS_SP;
2125
          src_sel1 = `OC8051_ASS_IMM;
2126
          src_sel2 = `OC8051_ASS_DC;
2127
          alu_op = `OC8051_ALU_NOP;
2128
          imm_sel = `OC8051_IDS_PCL;
2129
          wr = 1'b1;
2130
          psw_set = `OC8051_PS_NOT;
2131
          cy_sel = `OC8051_CY_0;
2132
          pc_wr = `OC8051_PCW_Y;
2133
          pc_sel = `OC8051_PIS_I16;
2134
          src_sel3 = `OC8051_AS3_DC;
2135
          comp_sel = `OC8051_CSS_DC;
2136
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2137
          wad2 = `OC8051_WAD_N;
2138
          rom_addr_sel = `OC8051_RAS_PC;
2139
          ext_addr_sel = `OC8051_EAS_DC;
2140
        end
2141
      `OC8051_LJMP : begin
2142
          ram_rd_sel = `OC8051_RRS_DC;
2143
          ram_wr_sel = `OC8051_RWS_DC;
2144
          src_sel1 = `OC8051_ASS_DC;
2145
          src_sel2 = `OC8051_ASS_DC;
2146
          alu_op = `OC8051_ALU_NOP;
2147
          imm_sel = `OC8051_IDS_DC;
2148
          wr = 1'b0;
2149
          psw_set = `OC8051_PS_NOT;
2150
          cy_sel = `OC8051_CY_0;
2151
          pc_wr = `OC8051_PCW_Y;
2152
          pc_sel = `OC8051_PIS_I16;
2153
          src_sel3 = `OC8051_AS3_DC;
2154
          comp_sel = `OC8051_CSS_DC;
2155
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2156
          wad2 = `OC8051_WAD_N;
2157
          rom_addr_sel = `OC8051_RAS_PC;
2158
          ext_addr_sel = `OC8051_EAS_DC;
2159
        end
2160
      `OC8051_MOV_D : begin
2161
          ram_rd_sel = `OC8051_RRS_D;
2162
          ram_wr_sel = `OC8051_RWS_ACC;
2163
          src_sel1 = `OC8051_ASS_RAM;
2164
          src_sel2 = `OC8051_ASS_DC;
2165
          alu_op = `OC8051_ALU_NOP;
2166
          wr = 1'b1;
2167
          psw_set = `OC8051_PS_NOT;
2168
          cy_sel = `OC8051_CY_0;
2169
          pc_wr = `OC8051_PCW_N;
2170
          pc_sel = `OC8051_PIS_DC;
2171
          imm_sel = `OC8051_IDS_DC;
2172
          src_sel3 = `OC8051_AS3_DC;
2173
          comp_sel = `OC8051_CSS_DC;
2174
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2175
          wad2 = `OC8051_WAD_N;
2176
          rom_addr_sel = `OC8051_RAS_PC;
2177
          ext_addr_sel = `OC8051_EAS_DC;
2178
        end
2179
      `OC8051_MOV_C : begin
2180
          ram_rd_sel = `OC8051_RRS_DC;
2181
          ram_wr_sel = `OC8051_RWS_ACC;
2182
          src_sel1 = `OC8051_ASS_IMM;
2183
          src_sel2 = `OC8051_ASS_DC;
2184
          alu_op = `OC8051_ALU_NOP;
2185
          wr = 1'b1;
2186
          psw_set = `OC8051_PS_NOT;
2187
          cy_sel = `OC8051_CY_0;
2188
          pc_wr = `OC8051_PCW_N;
2189
          pc_sel = `OC8051_PIS_DC;
2190
          imm_sel = `OC8051_IDS_OP2;
2191
          src_sel3 = `OC8051_AS3_DC;
2192
          comp_sel = `OC8051_CSS_DC;
2193
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2194
          wad2 = `OC8051_WAD_N;
2195
          rom_addr_sel = `OC8051_RAS_PC;
2196
          ext_addr_sel = `OC8051_EAS_DC;
2197
        end
2198
 
2199
      `OC8051_MOV_DA : begin
2200
          ram_rd_sel = `OC8051_RRS_DC;
2201
          ram_wr_sel = `OC8051_RWS_D;
2202
          src_sel1 = `OC8051_ASS_ACC;
2203
          src_sel2 = `OC8051_ASS_DC;
2204
          alu_op = `OC8051_ALU_NOP;
2205
          wr = 1'b1;
2206
          psw_set = `OC8051_PS_NOT;
2207
          cy_sel = `OC8051_CY_0;
2208
          pc_wr = `OC8051_PCW_N;
2209
          pc_sel = `OC8051_PIS_DC;
2210
          imm_sel = `OC8051_IDS_DC;
2211
          src_sel3 = `OC8051_AS3_DC;
2212
          comp_sel = `OC8051_CSS_DC;
2213
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2214
          wad2 = `OC8051_WAD_N;
2215
          rom_addr_sel = `OC8051_RAS_PC;
2216
          ext_addr_sel = `OC8051_EAS_DC;
2217
        end
2218
      `OC8051_MOV_DD : begin
2219
          ram_rd_sel = `OC8051_RRS_D;
2220
          ram_wr_sel = `OC8051_RWS_D3;
2221
          src_sel1 = `OC8051_ASS_RAM;
2222
          src_sel2 = `OC8051_ASS_DC;
2223
          alu_op = `OC8051_ALU_NOP;
2224
          wr = 1'b1;
2225
          psw_set = `OC8051_PS_NOT;
2226
          cy_sel = `OC8051_CY_0;
2227
          pc_wr = `OC8051_PCW_N;
2228
          pc_sel = `OC8051_PIS_DC;
2229
          imm_sel = `OC8051_IDS_OP2;
2230
          src_sel3 = `OC8051_AS3_DC;
2231
          comp_sel = `OC8051_CSS_DC;
2232
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2233
          wad2 = `OC8051_WAD_N;
2234
          rom_addr_sel = `OC8051_RAS_PC;
2235
          ext_addr_sel = `OC8051_EAS_DC;
2236
        end
2237
      `OC8051_MOV_CD : begin
2238
          ram_rd_sel = `OC8051_RRS_DC;
2239
          ram_wr_sel = `OC8051_RWS_D;
2240
          src_sel1 = `OC8051_ASS_IMM;
2241
          src_sel2 = `OC8051_ASS_DC;
2242
          alu_op = `OC8051_ALU_NOP;
2243
          wr = 1'b1;
2244
          psw_set = `OC8051_PS_NOT;
2245
          cy_sel = `OC8051_CY_0;
2246
          pc_wr = `OC8051_PCW_N;
2247
          pc_sel = `OC8051_PIS_DC;
2248
          imm_sel = `OC8051_IDS_OP3;
2249
          src_sel3 = `OC8051_AS3_DC;
2250
          comp_sel = `OC8051_CSS_DC;
2251
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2252
          wad2 = `OC8051_WAD_N;
2253
          rom_addr_sel = `OC8051_RAS_PC;
2254
          ext_addr_sel = `OC8051_EAS_DC;
2255
        end
2256
      `OC8051_MOV_BC : begin
2257
          ram_rd_sel = `OC8051_RRS_D;
2258
          ram_wr_sel = `OC8051_RWS_DC;
2259
          src_sel1 = `OC8051_ASS_DC;
2260
          src_sel2 = `OC8051_ASS_DC;
2261
          alu_op = `OC8051_ALU_NOP;
2262
          wr = 1'b0;
2263
          psw_set = `OC8051_PS_CY;
2264
          cy_sel = `OC8051_CY_RAM;
2265
          pc_wr = `OC8051_PCW_N;
2266
          pc_sel = `OC8051_PIS_DC;
2267
          imm_sel = `OC8051_IDS_DC;
2268
          src_sel3 = `OC8051_AS3_DC;
2269
          comp_sel = `OC8051_CSS_DC;
2270
          rmw = `OC8051_RMW_N;        bit_addr = 1'b1;
2271
          wad2 = `OC8051_WAD_N;
2272
          rom_addr_sel = `OC8051_RAS_PC;
2273
          ext_addr_sel = `OC8051_EAS_DC;
2274
        end
2275
      `OC8051_MOV_CB : begin
2276
          ram_rd_sel = `OC8051_RRS_D;
2277
          ram_wr_sel = `OC8051_RWS_D;
2278
          src_sel1 = `OC8051_ASS_DC;
2279
          src_sel2 = `OC8051_ASS_DC;
2280
          alu_op = `OC8051_ALU_NOP;
2281
          wr = 1'b1;
2282
          psw_set = `OC8051_PS_NOT;
2283
          cy_sel = `OC8051_CY_PSW;
2284
          pc_wr = `OC8051_PCW_N;
2285
          pc_sel = `OC8051_PIS_DC;
2286
          imm_sel = `OC8051_IDS_OP3;
2287
          src_sel3 = `OC8051_AS3_DC;
2288
          comp_sel = `OC8051_CSS_DC;
2289
          rmw = `OC8051_RMW_N;        bit_addr = 1'b1;
2290
          wad2 = `OC8051_WAD_N;
2291
          rom_addr_sel = `OC8051_RAS_PC;
2292
          ext_addr_sel = `OC8051_EAS_DC;
2293
        end
2294
      `OC8051_MOV_DP : begin  ///***
2295
          ram_rd_sel = `OC8051_RRS_DC;
2296
          ram_wr_sel = `OC8051_RWS_DPTR;
2297
          src_sel1 = `OC8051_ASS_IMM;
2298
          src_sel2 = `OC8051_ASS_IMM;
2299
          alu_op = `OC8051_ALU_NOP;
2300
          wr = 1'b1;
2301
          psw_set = `OC8051_PS_NOT;
2302
          cy_sel = `OC8051_CY_0;
2303
          pc_wr = `OC8051_PCW_N;
2304
          pc_sel = `OC8051_PIS_DC;
2305
          imm_sel = `OC8051_IDS_OP3_OP2;
2306
          src_sel3 = `OC8051_AS3_DC;
2307
          comp_sel = `OC8051_CSS_DC;
2308
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2309
          wad2 = `OC8051_WAD_N;
2310
          rom_addr_sel = `OC8051_RAS_PC;
2311
          ext_addr_sel = `OC8051_EAS_DC;
2312
        end
2313
      `OC8051_MOVC_DP :begin
2314
          ram_rd_sel = `OC8051_RRS_D;
2315
          ram_wr_sel = `OC8051_RWS_DC;
2316
          src_sel1 = `OC8051_ASS_ACC;
2317
          src_sel2 = `OC8051_ASS_RAM;
2318
          alu_op = `OC8051_ALU_ADD;
2319
          wr = 1'b0;
2320
          psw_set = `OC8051_PS_NOT;
2321
          cy_sel = `OC8051_CY_0;
2322
          pc_wr = `OC8051_PCW_N;
2323
          pc_sel = `OC8051_PIS_DC;
2324
          imm_sel = `OC8051_IDS_DC;
2325
          src_sel3 = `OC8051_AS3_DP;
2326
          comp_sel = `OC8051_CSS_DC;
2327
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2328
          wad2 = `OC8051_WAD_N;
2329
          rom_addr_sel = `OC8051_RAS_PC;
2330
          ext_addr_sel = `OC8051_EAS_DC;
2331
        end
2332
      `OC8051_MOVC_PC : begin
2333
          ram_rd_sel = `OC8051_RRS_DC;
2334
          ram_wr_sel = `OC8051_RWS_DC;
2335 8 markom
          src_sel1 = `OC8051_ASS_IMM;
2336
          src_sel2 = `OC8051_ASS_ACC;
2337 2 simont
          alu_op = `OC8051_ALU_ADD;
2338
          wr = 1'b0;
2339
          psw_set = `OC8051_PS_NOT;
2340
          cy_sel = `OC8051_CY_0;
2341
          pc_wr = `OC8051_PCW_N;
2342
          pc_sel = `OC8051_PIS_DC;
2343
          imm_sel = `OC8051_IDS_PCL;
2344
          src_sel3 = `OC8051_AS3_PC;
2345
          comp_sel = `OC8051_CSS_DC;
2346
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2347
          wad2 = `OC8051_WAD_N;
2348
          rom_addr_sel = `OC8051_RAS_PC;
2349
          ext_addr_sel = `OC8051_EAS_DC;
2350
        end
2351
      `OC8051_MOVX_PA : begin
2352
          ram_rd_sel = `OC8051_RRS_DC;
2353
          ram_wr_sel = `OC8051_RWS_ACC;
2354
          src_sel1 = `OC8051_ASS_XRAM;
2355
          src_sel2 = `OC8051_ASS_DC;
2356
          alu_op = `OC8051_ALU_NOP;
2357
          wr = 1'b1;
2358
          psw_set = `OC8051_PS_NOT;
2359
          cy_sel = `OC8051_CY_0;
2360
          pc_wr = `OC8051_PCW_N;
2361
          pc_sel = `OC8051_PIS_DC;
2362
          imm_sel = `OC8051_IDS_OP2;
2363
          src_sel3 = `OC8051_AS3_DC;
2364
          comp_sel = `OC8051_CSS_DC;
2365
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2366
          wad2 = `OC8051_WAD_N;
2367
          rom_addr_sel = `OC8051_RAS_PC;
2368
          ext_addr_sel = `OC8051_EAS_DPTR;
2369
        end
2370
      `OC8051_MOVX_AP : begin
2371
          ram_rd_sel = `OC8051_RRS_DC;
2372
          ram_wr_sel = `OC8051_RWS_DC;
2373
          src_sel1 = `OC8051_ASS_XRAM;
2374
          src_sel2 = `OC8051_ASS_DC;
2375
          alu_op = `OC8051_ALU_NOP;
2376
          wr = 1'b0;
2377
          psw_set = `OC8051_PS_NOT;
2378
          cy_sel = `OC8051_CY_0;
2379
          pc_wr = `OC8051_PCW_N;
2380
          pc_sel = `OC8051_PIS_DC;
2381
          imm_sel = `OC8051_IDS_DC;
2382
          src_sel3 = `OC8051_AS3_DC;
2383
          comp_sel = `OC8051_CSS_DC;
2384
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2385
          wad2 = `OC8051_WAD_N;
2386
          rom_addr_sel = `OC8051_RAS_PC;
2387
          ext_addr_sel = `OC8051_EAS_DPTR;
2388
        end
2389
      `OC8051_MUL : begin
2390
          ram_rd_sel = `OC8051_RRS_D;
2391
          ram_wr_sel = `OC8051_RWS_B;
2392
          src_sel1 = `OC8051_ASS_ACC;
2393
          src_sel2 = `OC8051_ASS_RAM;
2394
          alu_op = `OC8051_ALU_MUL;
2395
          wr = 1'b1;
2396
          psw_set = `OC8051_PS_OV;
2397
          cy_sel = `OC8051_CY_0;
2398
          pc_wr = `OC8051_PCW_N;
2399
          pc_sel = `OC8051_PIS_DC;
2400
          imm_sel = `OC8051_IDS_DC;
2401
          src_sel3 = `OC8051_AS3_DC;
2402
          comp_sel = `OC8051_CSS_DC;
2403
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2404
          wad2 = `OC8051_WAD_Y;
2405
          rom_addr_sel = `OC8051_RAS_PC;
2406
          ext_addr_sel = `OC8051_EAS_DC;
2407
        end
2408
      `OC8051_ORL_D : begin
2409
          ram_rd_sel = `OC8051_RRS_D;
2410
          ram_wr_sel = `OC8051_RWS_ACC;
2411
          src_sel1 = `OC8051_ASS_RAM;
2412
          src_sel2 = `OC8051_ASS_ACC;
2413
          alu_op = `OC8051_ALU_OR;
2414
          wr = 1'b1;
2415
          psw_set = `OC8051_PS_NOT;
2416
          cy_sel = `OC8051_CY_0;
2417
          pc_wr = `OC8051_PCW_N;
2418
          pc_sel = `OC8051_PIS_DC;
2419
          imm_sel = `OC8051_IDS_DC;
2420
          src_sel3 = `OC8051_AS3_DC;
2421
          comp_sel = `OC8051_CSS_DC;
2422
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
2423
          wad2 = `OC8051_WAD_N;
2424
          rom_addr_sel = `OC8051_RAS_PC;
2425
          ext_addr_sel = `OC8051_EAS_DC;
2426
        end
2427
      `OC8051_ORL_C : begin
2428
          ram_rd_sel = `OC8051_RRS_DC;
2429
          ram_wr_sel = `OC8051_RWS_ACC;
2430
          src_sel1 = `OC8051_ASS_IMM;
2431
          src_sel2 = `OC8051_ASS_ACC;
2432
          alu_op = `OC8051_ALU_OR;
2433
          wr = 1'b1;
2434
          psw_set = `OC8051_PS_NOT;
2435
          cy_sel = `OC8051_CY_0;
2436
          pc_wr = `OC8051_PCW_N;
2437
          pc_sel = `OC8051_PIS_DC;
2438
          imm_sel = `OC8051_IDS_OP2;
2439
          src_sel3 = `OC8051_AS3_DC;
2440
          comp_sel = `OC8051_CSS_DC;
2441
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
2442
          wad2 = `OC8051_WAD_N;
2443
          rom_addr_sel = `OC8051_RAS_PC;
2444
          ext_addr_sel = `OC8051_EAS_DC;
2445
        end
2446
      `OC8051_ORL_AD : begin
2447
          ram_rd_sel = `OC8051_RRS_D;
2448
          ram_wr_sel = `OC8051_RWS_D;
2449
          src_sel1 = `OC8051_ASS_RAM;
2450
          src_sel2 = `OC8051_ASS_ACC;
2451
          alu_op = `OC8051_ALU_OR;
2452
          wr = 1'b1;
2453
          psw_set = `OC8051_PS_NOT;
2454
          cy_sel = `OC8051_CY_0;
2455
          pc_wr = `OC8051_PCW_N;
2456
          pc_sel = `OC8051_PIS_DC;
2457
          imm_sel = `OC8051_IDS_DC;
2458
          src_sel3 = `OC8051_AS3_DC;
2459
          comp_sel = `OC8051_CSS_DC;
2460
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
2461
          wad2 = `OC8051_WAD_N;
2462
          rom_addr_sel = `OC8051_RAS_PC;
2463
          ext_addr_sel = `OC8051_EAS_DC;
2464
        end
2465
      `OC8051_ORL_CD : begin
2466
          ram_rd_sel = `OC8051_RRS_D;
2467
          ram_wr_sel = `OC8051_RWS_D;
2468
          src_sel1 = `OC8051_ASS_IMM;
2469
          src_sel2 = `OC8051_ASS_RAM;
2470
          alu_op = `OC8051_ALU_OR;
2471
          wr = 1'b1;
2472
          psw_set = `OC8051_PS_NOT;
2473
          cy_sel = `OC8051_CY_0;
2474
          pc_wr = `OC8051_PCW_N;
2475
          pc_sel = `OC8051_PIS_DC;
2476
          imm_sel = `OC8051_IDS_OP3;
2477
          src_sel3 = `OC8051_AS3_DC;
2478
          comp_sel = `OC8051_CSS_DC;
2479
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
2480
          wad2 = `OC8051_WAD_N;
2481
          rom_addr_sel = `OC8051_RAS_PC;
2482
          ext_addr_sel = `OC8051_EAS_DC;
2483
        end
2484
      `OC8051_ORL_B : begin
2485
          ram_rd_sel = `OC8051_RRS_D;
2486
          ram_wr_sel = `OC8051_RWS_DC;
2487
          src_sel1 = `OC8051_ASS_DC;
2488
          src_sel2 = `OC8051_ASS_DC;
2489
          alu_op = `OC8051_ALU_OR;
2490
          wr = 1'b0;
2491
          psw_set = `OC8051_PS_CY;
2492
          cy_sel = `OC8051_CY_PSW;
2493
          pc_wr = `OC8051_PCW_N;
2494
          pc_sel = `OC8051_PIS_DC;
2495
          imm_sel = `OC8051_IDS_DC;
2496
          src_sel3 = `OC8051_AS3_DC;
2497
          comp_sel = `OC8051_CSS_DC;
2498
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b1;
2499
          wad2 = `OC8051_WAD_N;
2500
          rom_addr_sel = `OC8051_RAS_PC;
2501
          ext_addr_sel = `OC8051_EAS_DC;
2502
        end
2503
      `OC8051_ORL_NB : begin
2504
          ram_rd_sel = `OC8051_RRS_D;
2505
          ram_wr_sel = `OC8051_RWS_DC;
2506
          src_sel1 = `OC8051_ASS_DC;
2507
          src_sel2 = `OC8051_ASS_DC;
2508
          alu_op = `OC8051_ALU_RL;
2509
          wr = 1'b0;
2510
          psw_set = `OC8051_PS_CY;
2511
          cy_sel = `OC8051_CY_PSW;
2512
          pc_wr = `OC8051_PCW_N;
2513
          pc_sel = `OC8051_PIS_DC;
2514
          imm_sel = `OC8051_IDS_DC;
2515
          src_sel3 = `OC8051_AS3_DC;
2516
          comp_sel = `OC8051_CSS_DC;
2517
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b1;
2518
          wad2 = `OC8051_WAD_N;
2519
          rom_addr_sel = `OC8051_RAS_PC;
2520
          ext_addr_sel = `OC8051_EAS_DC;
2521
        end
2522
      `OC8051_POP : begin
2523
          ram_rd_sel = `OC8051_RRS_SP;
2524
          ram_wr_sel = `OC8051_RWS_D;
2525
          src_sel1 = `OC8051_ASS_RAM;
2526
          src_sel2 = `OC8051_ASS_DC;
2527
          alu_op = `OC8051_ALU_NOP;
2528
          wr = 1'b1;
2529
          psw_set = `OC8051_PS_NOT;
2530
          cy_sel = `OC8051_CY_0;
2531
          pc_wr = `OC8051_PCW_N;
2532
          pc_sel = `OC8051_PIS_DC;
2533
          imm_sel = `OC8051_IDS_DC;
2534
          src_sel3 = `OC8051_AS3_DC;
2535
          comp_sel = `OC8051_CSS_DC;
2536
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2537
          wad2 = `OC8051_WAD_N;
2538
          rom_addr_sel = `OC8051_RAS_PC;
2539
          ext_addr_sel = `OC8051_EAS_DC;
2540
        end
2541
      `OC8051_PUSH : begin
2542
          ram_rd_sel = `OC8051_RRS_D;
2543
          ram_wr_sel = `OC8051_RWS_SP;
2544
          src_sel1 = `OC8051_ASS_RAM;
2545
          src_sel2 = `OC8051_ASS_DC;
2546
          alu_op = `OC8051_ALU_NOP;
2547
          wr = 1'b1;
2548
          psw_set = `OC8051_PS_NOT;
2549
          cy_sel = `OC8051_CY_0;
2550
          pc_wr = `OC8051_PCW_N;
2551
          pc_sel = `OC8051_PIS_DC;
2552
          imm_sel = `OC8051_IDS_DC;
2553
          src_sel3 = `OC8051_AS3_DC;
2554
          comp_sel = `OC8051_CSS_DC;
2555
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2556
          wad2 = `OC8051_WAD_N;
2557
          rom_addr_sel = `OC8051_RAS_PC;
2558
          ext_addr_sel = `OC8051_EAS_DC;
2559
        end
2560
      `OC8051_RET : begin
2561
          ram_rd_sel = `OC8051_RRS_SP;
2562
          ram_wr_sel = `OC8051_RWS_DC;
2563
          src_sel1 = `OC8051_ASS_RAM;
2564
          src_sel2 = `OC8051_ASS_DC;
2565
          alu_op = `OC8051_ALU_NOP;
2566
          wr = 1'b0;
2567
          psw_set = `OC8051_PS_NOT;
2568
          cy_sel = `OC8051_CY_0;
2569
          pc_wr = `OC8051_PCW_N;
2570
          pc_sel = `OC8051_PIS_DC;
2571
          imm_sel = `OC8051_IDS_DC;
2572
          src_sel3 = `OC8051_AS3_DC;
2573
          comp_sel = `OC8051_CSS_DC;
2574
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2575
          wad2 = `OC8051_WAD_N;
2576
          rom_addr_sel = `OC8051_RAS_PC;
2577
          ext_addr_sel = `OC8051_EAS_DC;
2578
        end
2579
      `OC8051_RETI : begin
2580
          ram_rd_sel = `OC8051_RRS_SP;
2581
          ram_wr_sel = `OC8051_RWS_DC;
2582
          src_sel1 = `OC8051_ASS_RAM;
2583
          src_sel2 = `OC8051_ASS_DC;
2584
          alu_op = `OC8051_ALU_NOP;
2585
          wr = 1'b0;
2586
          psw_set = `OC8051_PS_NOT;
2587
          cy_sel = `OC8051_CY_0;
2588
          pc_wr = `OC8051_PCW_N;
2589
          pc_sel = `OC8051_PIS_DC;
2590
          imm_sel = `OC8051_IDS_DC;
2591
          src_sel3 = `OC8051_AS3_DC;
2592
          comp_sel = `OC8051_CSS_DC;
2593
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2594
          wad2 = `OC8051_WAD_N;
2595
          rom_addr_sel = `OC8051_RAS_PC;
2596
          ext_addr_sel = `OC8051_EAS_DC;
2597
        end
2598
      `OC8051_RL : begin
2599
          ram_rd_sel = `OC8051_RRS_DC;
2600
          ram_wr_sel = `OC8051_RWS_ACC;
2601
          src_sel1 = `OC8051_ASS_ACC;
2602
          src_sel2 = `OC8051_ASS_DC;
2603
          alu_op = `OC8051_ALU_RL;
2604
          wr = 1'b1;
2605
          psw_set = `OC8051_PS_NOT;
2606
          cy_sel = `OC8051_CY_0;
2607
          pc_wr = `OC8051_PCW_N;
2608
          pc_sel = `OC8051_PIS_DC;
2609
          imm_sel = `OC8051_IDS_DC;
2610
          src_sel3 = `OC8051_AS3_DC;
2611
          comp_sel = `OC8051_CSS_DC;
2612
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2613
          wad2 = `OC8051_WAD_N;
2614
          rom_addr_sel = `OC8051_RAS_PC;
2615
          ext_addr_sel = `OC8051_EAS_DC;
2616
        end
2617
      `OC8051_RLC : begin
2618
          ram_rd_sel = `OC8051_RRS_DC;
2619
          ram_wr_sel = `OC8051_RWS_ACC;
2620
          src_sel1 = `OC8051_ASS_ACC;
2621
          src_sel2 = `OC8051_ASS_DC;
2622
          alu_op = `OC8051_ALU_RLC;
2623
          wr = 1'b1;
2624
          psw_set = `OC8051_PS_CY;
2625
          cy_sel = `OC8051_CY_PSW;
2626
          pc_wr = `OC8051_PCW_N;
2627
          pc_sel = `OC8051_PIS_DC;
2628
          imm_sel = `OC8051_IDS_DC;
2629
          src_sel3 = `OC8051_AS3_DC;
2630
          comp_sel = `OC8051_CSS_DC;
2631
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2632
          wad2 = `OC8051_WAD_N;
2633
          rom_addr_sel = `OC8051_RAS_PC;
2634
          ext_addr_sel = `OC8051_EAS_DC;
2635
        end
2636
      `OC8051_RR : begin
2637
          ram_rd_sel = `OC8051_RRS_DC;
2638
          ram_wr_sel = `OC8051_RWS_ACC;
2639
          src_sel1 = `OC8051_ASS_ACC;
2640
          src_sel2 = `OC8051_ASS_DC;
2641
          alu_op = `OC8051_ALU_RR;
2642
          wr = 1'b1;
2643
          psw_set = `OC8051_PS_NOT;
2644
          cy_sel = `OC8051_CY_0;
2645
          pc_wr = `OC8051_PCW_N;
2646
          pc_sel = `OC8051_PIS_DC;
2647
          imm_sel = `OC8051_IDS_DC;
2648
          src_sel3 = `OC8051_AS3_DC;
2649
          comp_sel = `OC8051_CSS_DC;
2650
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2651
          wad2 = `OC8051_WAD_N;
2652
          rom_addr_sel = `OC8051_RAS_PC;
2653
          ext_addr_sel = `OC8051_EAS_DC;
2654
        end
2655
      `OC8051_RRC : begin
2656
          ram_rd_sel = `OC8051_RRS_DC;
2657
          ram_wr_sel = `OC8051_RWS_ACC;
2658
          src_sel1 = `OC8051_ASS_ACC;
2659
          src_sel2 = `OC8051_ASS_DC;
2660
          alu_op = `OC8051_ALU_RRC;
2661
          wr = 1'b1;
2662
          psw_set = `OC8051_PS_CY;
2663
          cy_sel = `OC8051_CY_PSW;
2664
          pc_wr = `OC8051_PCW_N;
2665
          pc_sel = `OC8051_PIS_DC;
2666
          imm_sel = `OC8051_IDS_DC;
2667
          src_sel3 = `OC8051_AS3_DC;
2668
          comp_sel = `OC8051_CSS_DC;
2669
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2670
          wad2 = `OC8051_WAD_N;
2671
          rom_addr_sel = `OC8051_RAS_PC;
2672
          ext_addr_sel = `OC8051_EAS_DC;
2673
        end
2674
      `OC8051_SETB_C : begin
2675
          ram_rd_sel = `OC8051_RRS_DC;
2676
          ram_wr_sel = `OC8051_RWS_DC;
2677
          src_sel1 = `OC8051_ASS_DC;
2678
          src_sel2 = `OC8051_ASS_DC;
2679
          alu_op = `OC8051_ALU_NOP;
2680
          wr = 1'b0;
2681
          psw_set = `OC8051_PS_CY;
2682
          cy_sel = `OC8051_CY_1;
2683
          pc_wr = `OC8051_PCW_N;
2684
          pc_sel = `OC8051_PIS_DC;
2685
          imm_sel = `OC8051_IDS_DC;
2686
          src_sel3 = `OC8051_AS3_PC;
2687
          comp_sel = `OC8051_CSS_DC;
2688
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2689
          wad2 = `OC8051_WAD_N;
2690
          rom_addr_sel = `OC8051_RAS_PC;
2691
          ext_addr_sel = `OC8051_EAS_DC;
2692
        end
2693
      `OC8051_SETB_B : begin
2694
          ram_rd_sel = `OC8051_RRS_D;
2695
          ram_wr_sel = `OC8051_RWS_D;
2696
          src_sel1 = `OC8051_ASS_DC;
2697
          src_sel2 = `OC8051_ASS_DC;
2698
          alu_op = `OC8051_ALU_NOP;
2699
          wr = 1'b1;
2700
          psw_set = `OC8051_PS_NOT;
2701
          cy_sel = `OC8051_CY_1;
2702
          pc_wr = `OC8051_PCW_N;
2703
          pc_sel = `OC8051_PIS_DC;
2704
          imm_sel = `OC8051_IDS_DC;
2705
          src_sel3 = `OC8051_AS3_PC;
2706
          comp_sel = `OC8051_CSS_DC;
2707
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b1;
2708
          wad2 = `OC8051_WAD_N;
2709
          rom_addr_sel = `OC8051_RAS_PC;
2710
          ext_addr_sel = `OC8051_EAS_DC;
2711
        end
2712
      `OC8051_SJMP : begin
2713
          ram_rd_sel = `OC8051_RRS_DC;
2714
          ram_wr_sel = `OC8051_RWS_DC;
2715
          src_sel1 = `OC8051_ASS_IMM;
2716
          src_sel2 = `OC8051_ASS_IMM;
2717
          alu_op = `OC8051_ALU_PCS;
2718
          wr = 1'b0;
2719
          psw_set = `OC8051_PS_NOT;
2720
          cy_sel = `OC8051_CY_0;
2721
          pc_wr = `OC8051_PCW_N;
2722
          pc_sel = `OC8051_PIS_DC;
2723
          imm_sel = `OC8051_IDS_OP2_PCL;
2724
          src_sel3 = `OC8051_AS3_PC;
2725
          comp_sel = `OC8051_CSS_DC;
2726
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2727
          wad2 = `OC8051_WAD_N;
2728
          rom_addr_sel = `OC8051_RAS_PC;
2729
          ext_addr_sel = `OC8051_EAS_DC;
2730
        end
2731
      `OC8051_SUBB_D : begin
2732
          ram_rd_sel = `OC8051_RRS_D;
2733
          ram_wr_sel = `OC8051_RWS_ACC;
2734
          src_sel1 = `OC8051_ASS_ACC;
2735
          src_sel2 = `OC8051_ASS_RAM;
2736
          alu_op = `OC8051_ALU_SUB;
2737
          wr = 1'b1;
2738
          psw_set = `OC8051_PS_AC;
2739
          cy_sel = `OC8051_CY_PSW;
2740
          pc_wr = `OC8051_PCW_N;
2741
          pc_sel = `OC8051_PIS_DC;
2742
          imm_sel = `OC8051_IDS_DC;
2743
          src_sel3 = `OC8051_AS3_DC;
2744
          comp_sel = `OC8051_CSS_DC;
2745
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2746
          wad2 = `OC8051_WAD_N;
2747
          rom_addr_sel = `OC8051_RAS_PC;
2748
          ext_addr_sel = `OC8051_EAS_DC;
2749
        end
2750
      `OC8051_SUBB_C : begin
2751
          ram_rd_sel = `OC8051_RRS_DC;
2752
          ram_wr_sel = `OC8051_RWS_ACC;
2753
          src_sel1 = `OC8051_ASS_ACC;
2754
          src_sel2 = `OC8051_ASS_IMM;
2755
          alu_op = `OC8051_ALU_SUB;
2756
          wr = 1'b1;
2757
          psw_set = `OC8051_PS_AC;
2758
          cy_sel = `OC8051_CY_PSW;
2759
          pc_wr = `OC8051_PCW_N;
2760
          pc_sel = `OC8051_PIS_DC;
2761
          imm_sel = `OC8051_IDS_OP2;
2762
          src_sel3 = `OC8051_AS3_DC;
2763
          comp_sel = `OC8051_CSS_DC;
2764
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2765
          wad2 = `OC8051_WAD_N;
2766
          rom_addr_sel = `OC8051_RAS_PC;
2767
          ext_addr_sel = `OC8051_EAS_DC;
2768
        end
2769
      `OC8051_SWAP : begin
2770
          ram_rd_sel = `OC8051_RRS_DC;
2771
          ram_wr_sel = `OC8051_RWS_DC;
2772
          src_sel1 = `OC8051_ASS_ACC;
2773
          src_sel2 = `OC8051_ASS_DC;
2774
          alu_op = `OC8051_ALU_RLC;
2775
          wr = 1'b0;
2776
          psw_set = `OC8051_PS_NOT;
2777
          cy_sel = `OC8051_CY_0;
2778
          pc_wr = `OC8051_PCW_N;
2779
          pc_sel = `OC8051_PIS_DC;
2780
          imm_sel = `OC8051_IDS_DC;
2781
          src_sel3 = `OC8051_AS3_DC;
2782
          comp_sel = `OC8051_CSS_DC;
2783
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2784
          wad2 = `OC8051_WAD_Y;
2785
          rom_addr_sel = `OC8051_RAS_PC;
2786
          ext_addr_sel = `OC8051_EAS_DC;
2787
        end
2788
      `OC8051_XCH_D : begin
2789
          ram_rd_sel = `OC8051_RRS_D;
2790
          ram_wr_sel = `OC8051_RWS_D;
2791
          src_sel1 = `OC8051_ASS_RAM;
2792
          src_sel2 = `OC8051_ASS_ACC;
2793
          alu_op = `OC8051_ALU_XCH;
2794
          wr = 1'b1;
2795
          psw_set = `OC8051_PS_NOT;
2796
          cy_sel = `OC8051_CY_1;
2797
          pc_wr = `OC8051_PCW_N;
2798
          pc_sel = `OC8051_PIS_DC;
2799
          imm_sel = `OC8051_IDS_DC;
2800
          src_sel3 = `OC8051_AS3_DC;
2801
          comp_sel = `OC8051_CSS_DC;
2802
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2803
          wad2 = `OC8051_WAD_Y;
2804
          rom_addr_sel = `OC8051_RAS_PC;
2805
          ext_addr_sel = `OC8051_EAS_DC;
2806
        end
2807
      `OC8051_XRL_D : begin
2808
          ram_rd_sel = `OC8051_RRS_D;
2809
          ram_wr_sel = `OC8051_RWS_ACC;
2810
          src_sel1 = `OC8051_ASS_RAM;
2811
          src_sel2 = `OC8051_ASS_ACC;
2812
          alu_op = `OC8051_ALU_XOR;
2813
          wr = 1'b1;
2814
          psw_set = `OC8051_PS_NOT;
2815
          cy_sel = `OC8051_CY_0;
2816
          pc_wr = `OC8051_PCW_N;
2817
          pc_sel = `OC8051_PIS_DC;
2818
          imm_sel = `OC8051_IDS_DC;
2819
          src_sel3 = `OC8051_AS3_DC;
2820
          comp_sel = `OC8051_CSS_DC;
2821
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
2822
          wad2 = `OC8051_WAD_N;
2823
          rom_addr_sel = `OC8051_RAS_PC;
2824
          ext_addr_sel = `OC8051_EAS_DC;
2825
        end
2826
      `OC8051_XRL_C : begin
2827
          ram_rd_sel = `OC8051_RRS_DC;
2828
          ram_wr_sel = `OC8051_RWS_ACC;
2829
          src_sel1 = `OC8051_ASS_IMM;
2830
          src_sel2 = `OC8051_ASS_ACC;
2831
          alu_op = `OC8051_ALU_XOR;
2832
          wr = 1'b1;
2833
          psw_set = `OC8051_PS_NOT;
2834
          cy_sel = `OC8051_CY_0;
2835
          pc_wr = `OC8051_PCW_N;
2836
          pc_sel = `OC8051_PIS_DC;
2837
          imm_sel = `OC8051_IDS_OP2;
2838
          src_sel3 = `OC8051_AS3_DC;
2839
          comp_sel = `OC8051_CSS_DC;
2840
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
2841
          wad2 = `OC8051_WAD_N;
2842
          rom_addr_sel = `OC8051_RAS_PC;
2843
          ext_addr_sel = `OC8051_EAS_DC;
2844
        end
2845
      `OC8051_XRL_AD : begin
2846
          ram_rd_sel = `OC8051_RRS_D;
2847
          ram_wr_sel = `OC8051_RWS_D;
2848
          src_sel1 = `OC8051_ASS_RAM;
2849
          src_sel2 = `OC8051_ASS_ACC;
2850
          alu_op = `OC8051_ALU_XOR;
2851
          wr = 1'b1;
2852
          psw_set = `OC8051_PS_NOT;
2853
          cy_sel = `OC8051_CY_0;
2854
          pc_wr = `OC8051_PCW_N;
2855
          pc_sel = `OC8051_PIS_DC;
2856
          imm_sel = `OC8051_IDS_DC;
2857
          src_sel3 = `OC8051_AS3_DC;
2858
          comp_sel = `OC8051_CSS_DC;
2859
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
2860
          wad2 = `OC8051_WAD_N;
2861
          rom_addr_sel = `OC8051_RAS_PC;
2862
          ext_addr_sel = `OC8051_EAS_DC;
2863
        end
2864
      `OC8051_XRL_CD : begin
2865
          ram_rd_sel = `OC8051_RRS_D;
2866
          ram_wr_sel = `OC8051_RWS_D;
2867
          src_sel1 = `OC8051_ASS_IMM;
2868
          src_sel2 = `OC8051_ASS_RAM;
2869
          alu_op = `OC8051_ALU_XOR;
2870
          wr = 1'b1;
2871
          psw_set = `OC8051_PS_NOT;
2872
          cy_sel = `OC8051_CY_0;
2873
          pc_wr = `OC8051_PCW_N;
2874
          pc_sel = `OC8051_PIS_DC;
2875
          imm_sel = `OC8051_IDS_OP3;
2876
          src_sel3 = `OC8051_AS3_DC;
2877
          comp_sel = `OC8051_CSS_DC;
2878
          rmw = `OC8051_RMW_Y;        bit_addr = 1'b0;
2879
          wad2 = `OC8051_WAD_N;
2880
          rom_addr_sel = `OC8051_RAS_PC;
2881
          ext_addr_sel = `OC8051_EAS_DC;
2882
        end
2883
      default: begin
2884
          ram_rd_sel = `OC8051_RRS_DC;
2885
          ram_wr_sel = `OC8051_RWS_DC;
2886
          src_sel1 = `OC8051_ASS_DC;
2887
          src_sel2 = `OC8051_ASS_DC;
2888
          alu_op = `OC8051_ALU_NOP;
2889
          imm_sel = `OC8051_IDS_DC;
2890
          wr = 1'b0;
2891
          psw_set = `OC8051_PS_NOT;
2892
          cy_sel = `OC8051_CY_0;
2893
          pc_wr = `OC8051_PCW_N;
2894
          pc_sel = `OC8051_PIS_DC;
2895
          src_sel3 = `OC8051_AS3_DC;
2896
          comp_sel = `OC8051_CSS_DC;
2897
          rmw = `OC8051_RMW_N;        bit_addr = 1'b0;
2898
          wad2 = `OC8051_WAD_N;
2899
          rom_addr_sel = `OC8051_RAS_PC;
2900
          ext_addr_sel = `OC8051_EAS_DC;
2901
       end
2902
 
2903
    endcase
2904
    end
2905
    endcase
2906
end
2907
 
2908
//
2909
// remember current instruction
2910 4 markom
always @(posedge clk or posedge rst)
2911
  if (rst) op <= #1 2'b00;
2912
  else if (state==2'b00) op <= #1 op_in;
2913 2 simont
 
2914
//
2915
// in case of instructions that needs more than one clock set state
2916
always @(posedge clk or posedge rst)
2917
begin
2918
  if (rst)
2919
    state <= #1 2'b00;
2920
  else begin
2921
    case (state)
2922
      2'b10: state <= #1 2'b01;
2923
      2'b11: state <= #1 2'b10;
2924
      2'b00:
2925
        casex (op_in)
2926
          `OC8051_ACALL :state <= #1 2'b01;
2927
          `OC8051_AJMP : state <= #1 2'b01;
2928
          `OC8051_CJNE_R :state <= #1 2'b11;
2929
          `OC8051_CJNE_I :state <= #1 2'b11;
2930
          `OC8051_CJNE_D : state <= #1 2'b11;
2931
          `OC8051_CJNE_C : state <= #1 2'b11;
2932
          `OC8051_LJMP : state <= #1 2'b01;
2933
          `OC8051_DJNZ_R :state <= #1 2'b11;
2934
          `OC8051_DJNZ_D :state <= #1 2'b11;
2935
          `OC8051_LCALL :state <= #1 2'b01;
2936
          `OC8051_MOVC_DP :state <= #1 2'b10;
2937
          `OC8051_MOVC_PC :state <= #1 2'b10;
2938
          `OC8051_RET : state <= #1 2'b11;
2939
          `OC8051_RETI : state <= #1 2'b11;
2940
          `OC8051_SJMP : state <= #1 2'b10;
2941
          `OC8051_JB : state <= #1 2'b10;
2942
          `OC8051_JBC : state <= #1 2'b10;
2943
          `OC8051_JC : state <= #1 2'b10;
2944
          `OC8051_JMP : state <= #1 2'b10;
2945
          `OC8051_JNC : state <= #1 2'b10;
2946
          `OC8051_JNB : state <= #1 2'b10;
2947
          `OC8051_JNZ : state <= #1 2'b10;
2948
          `OC8051_JZ : state <= #1 2'b10;
2949
          default: state <= #1 2'b00;
2950
        endcase
2951
      default: state <= #1 2'b00;
2952
    endcase
2953
  end
2954
end
2955
 
2956
//
2957
//in case of reti
2958
always @(posedge clk)
2959
  if (op==`OC8051_RETI) reti <= #1 1'b1;
2960
  else reti <= #1 1'b0;
2961
 
2962
//
2963
//in case of writing to external ram
2964
always @(op_in or rst or rd)
2965
begin
2966
  if (rst)
2967
    write_x = 1'b0;
2968
  else if (rd)
2969
  begin
2970
    casex (op_in)
2971
      `OC8051_MOVX_AI : write_x = 1'b1;
2972
      `OC8051_MOVX_AP : write_x = 1'b1;
2973
      default : write_x = 1'b0;
2974
    endcase
2975
  end else write_x = 1'b0;
2976
end
2977
 
2978
 
2979
endmodule
2980
 
2981
 

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