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Library ieee;
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use ieee.std_logic_1164.all;
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ENTITY IC6821 IS
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-- GENERIC ();
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PORT
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(
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r_w: in std_logic;
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e: in std_logic;
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-- dbg: out std_logic_vector(7 downto 0);
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cs0: in std_logic;
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cs1: in std_logic;
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cs2: in std_logic; -- active low
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reset: in std_logic; -- active low
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RS0: in std_logic;
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RS1: in std_logic;
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CA1: in std_logic;
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CA2: inout std_logic;
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CB1: in std_logic;
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CB2: inout std_logic;
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DB: inout std_logic_vector(7 downto 0);
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PA: inout std_logic_vector(7 downto 0);
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PB: inout std_logic_vector(7 downto 0);
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irqa: out std_logic; -- active low
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irqb: out std_logic -- active low
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);
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END IC6821;
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-------------------------------------------------
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-------------------------------------------------
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ARCHITECTURE bhv1 OF IC6821 IS
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------------------------
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COMPONENT DFF
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PORT (d : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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clrn : IN STD_LOGIC;
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prn : IN STD_LOGIC;
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q : OUT STD_LOGIC );
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END COMPONENT;
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COMPONENT LATCH
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PORT (d : IN STD_LOGIC;
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ena: IN STD_LOGIC;
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q : OUT STD_LOGIC);
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END COMPONENT;
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COMPONENT TFF
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PORT (t : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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clrn: IN STD_LOGIC;
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prn : IN STD_LOGIC;
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q : OUT STD_LOGIC);
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END COMPONENT;
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-----------------------
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SIGNAL bufPA,DDRAbits,CRA : STD_LOGIC_VECTOR(7 downto 0);
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SIGNAL bufPB,DDRBbits,CRB : STD_LOGIC_VECTOR(7 downto 0);
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SIGNAL CRA2, CRB2, iCS: STD_LOGIC;
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SIGNAL irqaf1_1, irqaf1_2, irqaf2_1, irqaf2_2,
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irqbf1_1, irqbf1_2, irqbf2_1, irqbf2_2,
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prev_readA, mpu_readA,
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prev_writeB, mpu_readB: STD_LOGIC;
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SIGNAL disbla1, disbla2: std_logic;
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SIGNAL disblb1, disblb2: std_logic;
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SIGNAL edly: std_logic_vector(7 downto 0);
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SIGNAL DB_PA,DB_DDRA,DB_CRA, DB_PB,DB_DDRB,DB_CRB: std_logic_vector(7 downto 0);
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BEGIN
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iCS<= CS0 and CS1 and (not CS2);
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--------- peripheral register A
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bufPAprcs:
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PROCESS (E, RS0, RS1, CRA2, CRB2, DDRAbits,reset,iCS, DB, PA,r_w)
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BEGIN
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if reset='0' then bufPA<=(others=>'0');
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elsif RS0='0' and RS1='0' and CRA2='1' and r_w='0' and iCS='1' then
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FOR i IN 0 to 7 LOOP
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if DDRAbits(i)='1' then --- the pin acts like an output
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if e'event and e='0' then bufPA(i)<=DB(i); end if;
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elsif DDRAbits(i)='0' then --- the pin acts like an input
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if e'event and e='0' then bufPA(i)<=bufPA(i); end if;
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end if;
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END LOOP;
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elsif RS0='0' and RS1='0' and CRA2='1' and r_w='1' and iCS='1' then
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FOR i IN 0 to 7 LOOP
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if DDRAbits(i)='1' then --- the pin acts like an output
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if e'event and e='1' then DB_PA(i)<=bufPA(i); end if;
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elsif DDRAbits(i)='0' then --- the pin acts like an input
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if e'event and e='1' then bufPA(i)<=PA(i); DB_PA(i)<=PA(i); end if;
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end if;
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END LOOP;
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end if;
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END PROCESS;
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PAprcs:
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PROCESS (DDRAbits, bufPA)
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BEGIN
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FOR i IN 0 to 7 LOOP
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if DDRAbits(i)='1' then --- the pin acts like an output
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PA(i)<=bufPA(i);
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else PA(i)<='Z'; end if;
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END LOOP;
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END PROCESS;
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DDRAprcs:
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PROCESS (E, RS0, RS1, CRA2, reset,iCS,r_w)
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BEGIN
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if reset='0' then DDRAbits<=(others=>'0');
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elsif RS0='0' and RS1='0' and CRA2='0' and r_w ='0' and iCS='1' then
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if e'event and e='0' then DDRAbits<=DB; end if;
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elsif RS0='0' and RS1='0' and CRA2='0' and r_w ='1' and iCS='1' then
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if e'event and e='1' then DB_DDRA<=DDRAbits; end if;
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end if;
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END PROCESS;
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CRAprcs:
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PROCESS (E, RS0, RS1, reset,iCS,CRA,r_w)
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BEGIN
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if reset='0' then CRA(5 downto 0)<=(others=>'0');
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elsif RS0='1' and RS1='0' and r_w='0' and iCS='1' then
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if e'event and e='0' then CRA(5 downto 0)<=DB(5 downto 0); end if;
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elsif RS0='1' and RS1='0' and r_w='1' and iCS='1' then
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if e'event and e='1' then DB_CRA(5 downto 0)<=CRA(5 downto 0); end if;
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end if;
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CRA2<=CRA(2);
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END PROCESS;
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--------- peripheral register B
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bufPBprcs:
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PROCESS (E, RS0, RS1, CRA2, CRB2, DDRBbits,reset,iCS, DB, PB,r_w)
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BEGIN
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if reset='0' then bufPB<=(others=>'0');
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elsif RS0='0' and RS1='1' and CRB2='1' and r_w='0' and iCS='1' then
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FOR i IN 0 to 7 LOOP
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if DDRBbits(i)='1' then --- the pin acts like an output
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if e'event and e='0' then bufPB(i)<=DB(i); end if;
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elsif DDRBbits(i)='0' then --- the pin acts like an input
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if e'event and e='0' then bufPB(i)<=bufPB(i); end if;
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end if;
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END LOOP;
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elsif RS0='0' and RS1='1' and CRB2='1' and r_w='1' and iCS='1' then
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FOR i IN 0 to 7 LOOP
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if DDRBbits(i)='1' then --- the pin acts like an output
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if e'event and e='1' then DB_PB(i)<=bufPB(i); end if;
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elsif DDRBbits(i)='0' then --- the pin acts like an input
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if e'event and e='1' then bufPB(i)<=PB(i); DB_PB(i)<=PB(i); end if;
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end if;
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END LOOP;
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end if;
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END PROCESS;
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PBprcs:
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PROCESS (DDRBbits, bufPB)
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BEGIN
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FOR i IN 0 to 7 LOOP
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if DDRBbits(i)='1' then --- the pin acts like an output
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PB(i)<=bufPB(i);
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else PB(i)<='Z'; end if;
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END LOOP;
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END PROCESS;
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DDRBprcs:
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PROCESS (E, RS0, RS1, CRA2, CRB2,reset,iCS,r_w)
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BEGIN
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if reset='0' then DDRBbits<=(others=>'0');
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elsif RS0='0' and RS1='1' and CRB2='0' and r_w ='0' and iCS='1' then
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if e'event and e='0' then DDRBbits<=DB; end if;
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elsif RS0='0' and RS1='1' and CRB2='0' and r_w ='1' and iCS='1' then
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if e'event and e='1' then DB_DDRB<=DDRBbits; end if;
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end if;
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END PROCESS;
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CRBprcs:
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PROCESS (E, RS0, RS1, reset,iCS,CRB,r_w)
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BEGIN
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if reset='0' then CRB(5 downto 0)<=(others=>'0');
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elsif RS0='1' and RS1='1' and r_w='0' and iCS='1' then
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if e'event and e='0' then CRB(5 downto 0)<=DB(5 downto 0); end if;
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elsif RS0='1' and RS1='1' and r_w='1' and iCS='1' then
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if e'event and e='1' then DB_CRB(5 downto 0)<=CRB(5 downto 0); end if;
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end if;
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CRB2<=CRB(2);
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END PROCESS;
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-------------------------------------------------------
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------------- spooling with the data bus
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dbspoller:
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PROCESS (RS0, RS1, CRA2, CRB2, r_w, iCS,
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DB_PA, DB_DDRA, DB_CRA,
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DB_PB, DB_DDRB, DB_CRB)
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BEGIN
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if RS0='0' and RS1='0' and CRA2='1' and r_w='1' and iCS='1' then
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DB<=DB_PA;
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elsif RS0='0' and RS1='0' and CRA2='0' and r_w ='1' and iCS='1' then
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DB<=DB_DDRA;
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elsif RS0='1' and RS1='0' and r_w='1' and iCS='1' then
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DB<=DB_CRA;
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elsif RS0='0' and RS1='1' and CRB2='1' and r_w='1' and iCS='1' then
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DB<=DB_PB;
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elsif RS0='0' and RS1='1' and CRB2='0' and r_w ='1' and iCS='1' then
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DB<=DB_DDRB;
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elsif RS0='1' and RS1='1' and r_w='1' and iCS='1' then
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DB<=DB_CRB;
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ELSE
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DB<=(OTHERS=>'Z');
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END IF;
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END PROCESS;
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----------------------------------------------------
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---------- captures interrupts
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mpu_readA<=(not RS0) and (not RS1) and CRA2 and r_w and iCS;
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mpu_readB<=(not RS0) and RS1 and CRB2 and r_w and iCS;
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prvsread: -- this is the last read
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PROCESS (E, RS0, RS1, reset, r_w, iCS,CRA,CRB)
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BEGIN
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if reset='0' then prev_readA<='0';
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elsif e'event and e='1' then
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if RS0='0' and RS1='0' and CRA2='1' and r_w='1' and iCS='1' then
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prev_readA<='1';
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else prev_readA<='0';
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end if;
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end if;
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if reset='0' then prev_writeB<='0';
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elsif e'event and e='0' then
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if RS0='0' and RS1='1' and CRB2='1' and r_w='0' and iCS='1' then
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prev_writeB<='1';
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else prev_writeB<='0';
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end if;
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end if;
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END PROCESS;
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intrptsA:
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PROCESS (E, RS0, RS1, reset, r_w, CRA,CRB,mpu_readA,mpu_readB,
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prev_readA, prev_writeB,CA1,CB1,CA2,CB2,
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irqaf1_1,irqaf1_2,irqaf2_1,irqaf2_2,
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irqbf1_1, irqbf1_2,irqbf2_1,irqbf2_2,
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iCS,disbla1,disbla2,
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disblb1,disblb2)
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BEGIN
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disbla1<= (not CRA(0));
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disbla2<= (not CRA(5)) and (not CRA(3));
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------------------------------------------
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---- CA1 line
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if (reset='0') or (mpu_readA='1') then irqaf1_1<='0'; irqaf1_2<='0';
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elsif CRA(1)='0' then -- the latch for the CA1 is from high to low
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if CA1'event and CA1='0' then irqaf1_1<='1'; end if;
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elsif CRA(1)='1' then -- the latch for the CA1 is from low to high
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if CA1'event and CA1='1' then irqaf1_2<='1'; end if;
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end if;
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CRA(7)<=irqaf1_1 or irqaf1_2; -- flag bit
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if (disbla1='1') and CRA(7)='1' then irqa<='0';
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elsif (disbla2='1') and CRA(6)='1' then irqa<='0';
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else irqa<='Z'; end if;
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---- CA2 line
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if (reset='0') then
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elsif CRA(5)='1' and CRA(4)='0' and CRA(3)='0' then -- the CA2 is output
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-- read Strobe with CA1 restore
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if (irqaf1_1='1') or (irqaf1_2='1') then CA2<='1';
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elsif prev_readA='1' then
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if e'event and e='0' then CA2<='0'; end if;
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end if;
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elsif CRA(5)='1' and CRA(4)='0' and CRA(3)='1' then -- the CA2 is output
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271 |
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-- read Strobe with E restore
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if e'event and e='0' then
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if prev_readA='1' then CA2<='0';
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elsif ics='0' then CA2<='1'; end if;
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end if;
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elsif CRA(5)='1' and CRA(4)='1' then -- the CA2 is output
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CA2<=CRA(3);
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else
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CA2<='Z';
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end if;
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--------------------
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if (reset='0') or (mpu_readA='1') then irqaf1_1<='0'; irqaf1_2<='0';
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elsif CRA(5)='0' and CRA(4)='0' then -- the latch for the CA2 is from high to low
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284 |
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if CA2'event and CA2='0' then irqaf2_1<='1'; end if;
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elsif CRA(5)='0' and CRA(4)='1' then -- the latch for the CA2 is from low to high
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if CA2'event and CA2='1' then irqaf2_2<='1'; end if;
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end if;
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288 |
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CRA(6)<=irqaf2_1 or irqaf2_2; -- flag bit
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289 |
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---------------------------------------
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290 |
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---------------------------------------
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291 |
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disblb1<= (not CRB(0));
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disblb2<= (not CRB(5)) and (not CRB(3));
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293 |
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---- CB1 line
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294 |
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if (reset='0') or (mpu_readB='1') then irqbf1_1<='0'; irqbf1_2<='0';
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295 |
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elsif CRB(1)='0' then -- the latch for the CB1 is from high to low
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296 |
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if CB1'event and CB1='0' then irqbf1_1<='1'; end if;
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297 |
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elsif CRB(1)='1' then -- the latch for the CB1 is from low to high
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298 |
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if CB1'event and CB1='1' then irqbf1_2<='1'; end if;
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299 |
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end if;
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300 |
|
|
CRB(7)<=irqbf1_1 or irqbf1_2; -- flag bit
|
301 |
|
|
if (disblb1='1') and CRB(7)='1' then irqb<='0';
|
302 |
|
|
elsif (disblb2='1') and CRB(6)='1' then irqb<='0';
|
303 |
|
|
else irqb<='Z'; end if;
|
304 |
|
|
---- CB2 line
|
305 |
|
|
if (reset='0') then
|
306 |
|
|
|
307 |
|
|
elsif CRB(5)='1' and CRB(4)='0' and CRB(3)='0' then -- the CB2 is output
|
308 |
|
|
-- read Strobe with CA1 restore
|
309 |
|
|
if (irqbf1_1='1') or (irqbf1_2='1') then CB2<='1';
|
310 |
|
|
elsif prev_writeB='1' then
|
311 |
|
|
if e'event and e='1' then CB2<='0'; end if;
|
312 |
|
|
end if;
|
313 |
|
|
elsif CRB(5)='1' and CRB(4)='0' and CRB(3)='1' then -- the CB2 is output
|
314 |
|
|
-- read Strobe with E restore
|
315 |
|
|
if e'event and e='1' then
|
316 |
|
|
if prev_writeB='1' then CB2<='0';
|
317 |
|
|
elsif ics='0' then CB2<='1'; end if;
|
318 |
|
|
end if;
|
319 |
|
|
elsif CRB(5)='1' and CRB(4)='1' then -- the CB2 is output
|
320 |
|
|
CB2<=CRB(3);
|
321 |
|
|
else
|
322 |
|
|
CB2<='Z';
|
323 |
|
|
end if;
|
324 |
|
|
--------------------
|
325 |
|
|
if (reset='0') or (mpu_readB='1') then irqbf1_1<='0'; irqbf1_2<='0';
|
326 |
|
|
elsif CRB(5)='0' and CRB(4)='0' then -- the latch for the CB2 is from high to low
|
327 |
|
|
if CB2'event and CB2='0' then irqbf2_1<='1'; end if;
|
328 |
|
|
elsif CRB(5)='0' and CRB(4)='1' then -- the latch for the CB2 is from low to high
|
329 |
|
|
if CB2'event and CB2='1' then irqbf2_2<='1'; end if;
|
330 |
|
|
end if;
|
331 |
|
|
CRB(6)<=irqbf2_1 or irqbf2_2; -- flag bit
|
332 |
|
|
-------------------
|
333 |
|
|
END PROCESS;
|
334 |
|
|
|
335 |
|
|
END bhv1;
|
336 |
|
|
|