OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [opcodes/] [avr-dis.c] - Blame information for rev 53

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 18 khays
/* Disassemble AVR instructions.
2
   Copyright 1999, 2000, 2002, 2004, 2005, 2006, 2007, 2008
3
   Free Software Foundation, Inc.
4
 
5
   Contributed by Denis Chertykov <denisc@overta.ru>
6
 
7
   This file is part of libopcodes.
8
 
9
   This library is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
 
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License
20
   along with this program; if not, write to the Free Software
21
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22
   MA 02110-1301, USA.  */
23
 
24
#include <assert.h>
25
#include "sysdep.h"
26
#include "dis-asm.h"
27
#include "opintl.h"
28
#include "libiberty.h"
29
 
30
struct avr_opcodes_s
31
{
32
  char *name;
33
  char *constraints;
34
  char *opcode;
35
  int insn_size;                /* In words.  */
36
  int isa;
37
  unsigned int bin_opcode;
38
};
39
 
40
#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41
{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
42
 
43
const struct avr_opcodes_s avr_opcodes[] =
44
{
45
  #include "opcode/avr.h"
46
  {NULL, NULL, NULL, 0, 0, 0}
47
};
48
 
49
static const char * comment_start = "0x";
50
 
51
static int
52
avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
53
             char *opcode_str, char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
54
{
55
  int ok = 1;
56
  *sym = 0;
57
 
58
  switch (constraint)
59
    {
60
      /* Any register operand.  */
61
    case 'r':
62
      if (regs)
63
        insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register.  */
64
      else
65
        insn = (insn & 0x01f0) >> 4; /* Destination register.  */
66
 
67
      sprintf (buf, "r%d", insn);
68
      break;
69
 
70
    case 'd':
71
      if (regs)
72
        sprintf (buf, "r%d", 16 + (insn & 0xf));
73
      else
74
        sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
75
      break;
76
 
77
    case 'w':
78
      sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
79
      break;
80
 
81
    case 'a':
82
      if (regs)
83
        sprintf (buf, "r%d", 16 + (insn & 7));
84
      else
85
        sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
86
      break;
87
 
88
    case 'v':
89
      if (regs)
90
        sprintf (buf, "r%d", (insn & 0xf) * 2);
91
      else
92
        sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
93
      break;
94
 
95
    case 'e':
96
      {
97
        char *xyz;
98
 
99
        switch (insn & 0x100f)
100
          {
101
            case 0x0000: xyz = "Z";  break;
102
            case 0x1001: xyz = "Z+"; break;
103
            case 0x1002: xyz = "-Z"; break;
104
            case 0x0008: xyz = "Y";  break;
105
            case 0x1009: xyz = "Y+"; break;
106
            case 0x100a: xyz = "-Y"; break;
107
            case 0x100c: xyz = "X";  break;
108
            case 0x100d: xyz = "X+"; break;
109
            case 0x100e: xyz = "-X"; break;
110
            default: xyz = "??"; ok = 0;
111
          }
112
        strcpy (buf, xyz);
113
 
114
        if (AVR_UNDEF_P (insn))
115
          sprintf (comment, _("undefined"));
116
      }
117
      break;
118
 
119
    case 'z':
120
      *buf++ = 'Z';
121
 
122
      /* Check for post-increment. */
123
      char *s;
124
      for (s = opcode_str; *s; ++s)
125
        {
126
          if (*s == '+')
127
            {
128
        *buf++ = '+';
129
              break;
130
            }
131
        }
132
 
133
      *buf = '\0';
134
      if (AVR_UNDEF_P (insn))
135
        sprintf (comment, _("undefined"));
136
      break;
137
 
138
    case 'b':
139
      {
140
        unsigned int x;
141
 
142
        x = (insn & 7);
143
        x |= (insn >> 7) & (3 << 3);
144
        x |= (insn >> 8) & (1 << 5);
145
 
146
        if (insn & 0x8)
147
          *buf++ = 'Y';
148
        else
149
          *buf++ = 'Z';
150
        sprintf (buf, "+%d", x);
151
        sprintf (comment, "0x%02x", x);
152
      }
153
      break;
154
 
155
    case 'h':
156
      *sym = 1;
157
      *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
158
      /* See PR binutils/2454.  Ideally we would like to display the hex
159
         value of the address only once, but this would mean recoding
160
         objdump_print_address() which would affect many targets.  */
161
      sprintf (buf, "%#lx", (unsigned long) *sym_addr);
162
      strcpy (comment, comment_start);
163
      break;
164
 
165
    case 'L':
166
      {
167
        int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
168
        sprintf (buf, ".%+-8d", rel_addr);
169
        *sym = 1;
170
        *sym_addr = pc + 2 + rel_addr;
171
        strcpy (comment, comment_start);
172
      }
173
      break;
174
 
175
    case 'l':
176
      {
177
        int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
178
 
179
        sprintf (buf, ".%+-8d", rel_addr);
180
        *sym = 1;
181
        *sym_addr = pc + 2 + rel_addr;
182
        strcpy (comment, comment_start);
183
      }
184
      break;
185
 
186
    case 'i':
187
      sprintf (buf, "0x%04X", insn2);
188
      break;
189
 
190
    case 'M':
191
      sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
192
      sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
193
      break;
194
 
195
    case 'n':
196
      sprintf (buf, "??");
197
      fprintf (stderr, _("Internal disassembler error"));
198
      ok = 0;
199
      break;
200
 
201
    case 'K':
202
      {
203
        unsigned int x;
204
 
205
        x = (insn & 0xf) | ((insn >> 2) & 0x30);
206
        sprintf (buf, "0x%02x", x);
207
        sprintf (comment, "%d", x);
208
      }
209
      break;
210
 
211
    case 's':
212
      sprintf (buf, "%d", insn & 7);
213
      break;
214
 
215
    case 'S':
216
      sprintf (buf, "%d", (insn >> 4) & 7);
217
      break;
218
 
219
    case 'P':
220
      {
221
        unsigned int x;
222
 
223
        x = (insn & 0xf);
224
        x |= (insn >> 5) & 0x30;
225
        sprintf (buf, "0x%02x", x);
226
        sprintf (comment, "%d", x);
227
      }
228
      break;
229
 
230
    case 'p':
231
      {
232
        unsigned int x;
233
 
234
        x = (insn >> 3) & 0x1f;
235
        sprintf (buf, "0x%02x", x);
236
        sprintf (comment, "%d", x);
237
      }
238
      break;
239
 
240
    case 'E':
241
      sprintf (buf, "%d", (insn >> 4) & 15);
242
      break;
243
 
244
    case '?':
245
      *buf = '\0';
246
      break;
247
 
248
    default:
249
      sprintf (buf, "??");
250
      fprintf (stderr, _("unknown constraint `%c'"), constraint);
251
      ok = 0;
252
    }
253
 
254
    return ok;
255
}
256
 
257
static unsigned short
258
avrdis_opcode (bfd_vma addr, disassemble_info *info)
259
{
260
  bfd_byte buffer[2];
261
  int status;
262
 
263
  status = info->read_memory_func (addr, buffer, 2, info);
264
 
265
  if (status == 0)
266
    return bfd_getl16 (buffer);
267
 
268
  info->memory_error_func (status, addr, info);
269
  return -1;
270
}
271
 
272
 
273
int
274
print_insn_avr (bfd_vma addr, disassemble_info *info)
275
{
276
  unsigned int insn, insn2;
277
  const struct avr_opcodes_s *opcode;
278
  static unsigned int *maskptr;
279
  void *stream = info->stream;
280
  fprintf_ftype prin = info->fprintf_func;
281
  static unsigned int *avr_bin_masks;
282
  static int initialized;
283
  int cmd_len = 2;
284
  int ok = 0;
285
  char op1[20], op2[20], comment1[40], comment2[40];
286
  int sym_op1 = 0, sym_op2 = 0;
287
  bfd_vma sym_addr1, sym_addr2;
288
 
289
 
290
  if (!initialized)
291
    {
292
      unsigned int nopcodes;
293
 
294
      /* PR 4045: Try to avoid duplicating the 0x prefix that
295
         objdump_print_addr() will put on addresses when there
296
         is no symbol table available.  */
297
      if (info->symtab_size == 0)
298
        comment_start = " ";
299
 
300
      nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
301
 
302
      avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
303
 
304
      for (opcode = avr_opcodes, maskptr = avr_bin_masks;
305
           opcode->name;
306
           opcode++, maskptr++)
307
        {
308
          char * s;
309
          unsigned int bin = 0;
310
          unsigned int mask = 0;
311
 
312
          for (s = opcode->opcode; *s; ++s)
313
            {
314
              bin <<= 1;
315
              mask <<= 1;
316
              bin |= (*s == '1');
317
              mask |= (*s == '1' || *s == '0');
318
            }
319
          assert (s - opcode->opcode == 16);
320
          assert (opcode->bin_opcode == bin);
321
          *maskptr = mask;
322
        }
323
 
324
      initialized = 1;
325
    }
326
 
327
  insn = avrdis_opcode (addr, info);
328
 
329
  for (opcode = avr_opcodes, maskptr = avr_bin_masks;
330
       opcode->name;
331
       opcode++, maskptr++)
332
    if ((insn & *maskptr) == opcode->bin_opcode)
333
      break;
334
 
335
  /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
336
     `std b+0,r' as `st b,r' (next entry in the table).  */
337
 
338
  if (AVR_DISP0_P (insn))
339
    opcode++;
340
 
341
  op1[0] = 0;
342
  op2[0] = 0;
343
  comment1[0] = 0;
344
  comment2[0] = 0;
345
 
346
  if (opcode->name)
347
    {
348
      char *constraints = opcode->constraints;
349
      char *opcode_str = opcode->opcode;
350
 
351
      insn2 = 0;
352
      ok = 1;
353
 
354
      if (opcode->insn_size > 1)
355
        {
356
          insn2 = avrdis_opcode (addr + 2, info);
357
          cmd_len = 4;
358
        }
359
 
360
      if (*constraints && *constraints != '?')
361
        {
362
          int regs = REGISTER_P (*constraints);
363
 
364
          ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, comment1, 0, &sym_op1, &sym_addr1);
365
 
366
          if (ok && *(++constraints) == ',')
367
            ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2,
368
                              *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
369
        }
370
    }
371
 
372
  if (!ok)
373
    {
374
      /* Unknown opcode, or invalid combination of operands.  */
375
      sprintf (op1, "0x%04x", insn);
376
      op2[0] = 0;
377
      sprintf (comment1, "????");
378
      comment2[0] = 0;
379
    }
380
 
381
  (*prin) (stream, "%s", ok ? opcode->name : ".word");
382
 
383
  if (*op1)
384
      (*prin) (stream, "\t%s", op1);
385
 
386
  if (*op2)
387
    (*prin) (stream, ", %s", op2);
388
 
389
  if (*comment1)
390
    (*prin) (stream, "\t; %s", comment1);
391
 
392
  if (sym_op1)
393
    info->print_address_func (sym_addr1, info);
394
 
395
  if (*comment2)
396
    (*prin) (stream, " %s", comment2);
397
 
398
  if (sym_op2)
399
    info->print_address_func (sym_addr2, info);
400
 
401
  return cmd_len;
402
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.