OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [opcodes/] [disassemble.c] - Blame information for rev 53

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 18 khays
/* Select disassembly routine for specified architecture.
2
   Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3
   2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
4
 
5
   This file is part of the GNU opcodes library.
6
 
7
   This library is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3 of the License, or
10
   (at your option) any later version.
11
 
12
   This program is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with this program; if not, write to the Free Software
19
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20
   MA 02110-1301, USA.  */
21
 
22
#include "sysdep.h"
23
#include "dis-asm.h"
24
 
25
#ifdef ARCH_all
26
#define ARCH_alpha
27
#define ARCH_arc
28
#define ARCH_arm
29
#define ARCH_avr
30
#define ARCH_bfin
31
#define ARCH_cr16
32
#define ARCH_cris
33
#define ARCH_crx
34
#define ARCH_d10v
35
#define ARCH_d30v
36
#define ARCH_dlx
37
#define ARCH_fr30
38
#define ARCH_frv
39
#define ARCH_h8300
40
#define ARCH_h8500
41
#define ARCH_hppa
42
#define ARCH_i370
43
#define ARCH_i386
44
#define ARCH_i860
45
#define ARCH_i960
46
#define ARCH_ia64
47
#define ARCH_ip2k
48
#define ARCH_iq2000
49
#define ARCH_lm32
50
#define ARCH_m32c
51
#define ARCH_m32r
52
#define ARCH_m68hc11
53
#define ARCH_m68hc12
54
#define ARCH_m68k
55
#define ARCH_m88k
56
#define ARCH_mcore
57
#define ARCH_mep
58
#define ARCH_microblaze
59
#define ARCH_mips
60
#define ARCH_mmix
61
#define ARCH_mn10200
62
#define ARCH_mn10300
63
#define ARCH_moxie
64
#define ARCH_mt
65
#define ARCH_msp430
66
#define ARCH_ns32k
67
#define ARCH_open8
68
#define ARCH_openrisc
69
#define ARCH_or32
70
#define ARCH_pdp11
71
#define ARCH_pj
72
#define ARCH_powerpc
73
#define ARCH_rs6000
74
#define ARCH_rx
75
#define ARCH_s390
76
#define ARCH_score
77
#define ARCH_sh
78
#define ARCH_sparc
79
#define ARCH_spu
80
#define ARCH_tic30
81
#define ARCH_tic4x
82
#define ARCH_tic54x
83
#define ARCH_tic6x
84
#define ARCH_tic80
85
#define ARCH_v850
86
#define ARCH_vax
87
#define ARCH_w65
88
#define ARCH_xstormy16
89
#define ARCH_xc16x
90
#define ARCH_xtensa
91
#define ARCH_z80
92
#define ARCH_z8k
93
#define INCLUDE_SHMEDIA
94
#endif
95
 
96
#ifdef ARCH_m32c
97
#include "m32c-desc.h"
98
#endif
99
 
100
disassembler_ftype
101
disassembler (abfd)
102
     bfd *abfd;
103
{
104
  enum bfd_architecture a = bfd_get_arch (abfd);
105
  disassembler_ftype disassemble;
106
 
107
  switch (a)
108
    {
109
      /* If you add a case to this table, also add it to the
110
         ARCH_all definition right above this function.  */
111
#ifdef ARCH_alpha
112
    case bfd_arch_alpha:
113
      disassemble = print_insn_alpha;
114
      break;
115
#endif
116
#ifdef ARCH_arc
117
    case bfd_arch_arc:
118
      disassemble = arc_get_disassembler (abfd);
119
      break;
120
#endif
121
#ifdef ARCH_arm
122
    case bfd_arch_arm:
123
      if (bfd_big_endian (abfd))
124
        disassemble = print_insn_big_arm;
125
      else
126
        disassemble = print_insn_little_arm;
127
      break;
128
#endif
129
#ifdef ARCH_avr
130
    case bfd_arch_avr:
131
      disassemble = print_insn_avr;
132
      break;
133
#endif
134
#ifdef ARCH_bfin
135
    case bfd_arch_bfin:
136
      disassemble = print_insn_bfin;
137
      break;
138
#endif
139
#ifdef ARCH_cr16
140
    case bfd_arch_cr16:
141
      disassemble = print_insn_cr16;
142
      break;
143
#endif
144
#ifdef ARCH_cris
145
    case bfd_arch_cris:
146
      disassemble = cris_get_disassembler (abfd);
147
      break;
148
#endif
149
#ifdef ARCH_crx
150
    case bfd_arch_crx:
151
      disassemble = print_insn_crx;
152
      break;
153
#endif
154
#ifdef ARCH_d10v
155
    case bfd_arch_d10v:
156
      disassemble = print_insn_d10v;
157
      break;
158
#endif
159
#ifdef ARCH_d30v
160
    case bfd_arch_d30v:
161
      disassemble = print_insn_d30v;
162
      break;
163
#endif
164
#ifdef ARCH_dlx
165
    case bfd_arch_dlx:
166
      /* As far as I know we only handle big-endian DLX objects.  */
167
      disassemble = print_insn_dlx;
168
      break;
169
#endif
170
#ifdef ARCH_h8300
171
    case bfd_arch_h8300:
172
      if (bfd_get_mach (abfd) == bfd_mach_h8300h
173
          || bfd_get_mach (abfd) == bfd_mach_h8300hn)
174
        disassemble = print_insn_h8300h;
175
      else if (bfd_get_mach (abfd) == bfd_mach_h8300s
176
               || bfd_get_mach (abfd) == bfd_mach_h8300sn
177
               || bfd_get_mach (abfd) == bfd_mach_h8300sx
178
               || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
179
        disassemble = print_insn_h8300s;
180
      else
181
        disassemble = print_insn_h8300;
182
      break;
183
#endif
184
#ifdef ARCH_h8500
185
    case bfd_arch_h8500:
186
      disassemble = print_insn_h8500;
187
      break;
188
#endif
189
#ifdef ARCH_hppa
190
    case bfd_arch_hppa:
191
      disassemble = print_insn_hppa;
192
      break;
193
#endif
194
#ifdef ARCH_i370
195
    case bfd_arch_i370:
196
      disassemble = print_insn_i370;
197
      break;
198
#endif
199
#ifdef ARCH_i386
200
    case bfd_arch_i386:
201
    case bfd_arch_l1om:
202
      disassemble = print_insn_i386;
203
      break;
204
#endif
205
#ifdef ARCH_i860
206
    case bfd_arch_i860:
207
      disassemble = print_insn_i860;
208
      break;
209
#endif
210
#ifdef ARCH_i960
211
    case bfd_arch_i960:
212
      disassemble = print_insn_i960;
213
      break;
214
#endif
215
#ifdef ARCH_ia64
216
    case bfd_arch_ia64:
217
      disassemble = print_insn_ia64;
218
      break;
219
#endif
220
#ifdef ARCH_ip2k
221
    case bfd_arch_ip2k:
222
      disassemble = print_insn_ip2k;
223
      break;
224
#endif
225
#ifdef ARCH_fr30
226
    case bfd_arch_fr30:
227
      disassemble = print_insn_fr30;
228
      break;
229
#endif
230
#ifdef ARCH_lm32
231
    case bfd_arch_lm32:
232
      disassemble = print_insn_lm32;
233
      break;
234
#endif
235
#ifdef ARCH_m32r
236
    case bfd_arch_m32r:
237
      disassemble = print_insn_m32r;
238
      break;
239
#endif
240
#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
241
    case bfd_arch_m68hc11:
242
      disassemble = print_insn_m68hc11;
243
      break;
244
    case bfd_arch_m68hc12:
245
      disassemble = print_insn_m68hc12;
246
      break;
247
#endif
248
#ifdef ARCH_m68k
249
    case bfd_arch_m68k:
250
      disassemble = print_insn_m68k;
251
      break;
252
#endif
253
#ifdef ARCH_m88k
254
    case bfd_arch_m88k:
255
      disassemble = print_insn_m88k;
256
      break;
257
#endif
258
#ifdef ARCH_mt
259
    case bfd_arch_mt:
260
      disassemble = print_insn_mt;
261
      break;
262
#endif
263
#ifdef ARCH_microblaze
264
    case bfd_arch_microblaze:
265
      disassemble = print_insn_microblaze;
266
      break;
267
#endif
268
#ifdef ARCH_msp430
269
    case bfd_arch_msp430:
270
      disassemble = print_insn_msp430;
271
      break;
272
#endif
273
#ifdef ARCH_ns32k
274
    case bfd_arch_ns32k:
275
      disassemble = print_insn_ns32k;
276
      break;
277
#endif
278
#ifdef ARCH_mcore
279
    case bfd_arch_mcore:
280
      disassemble = print_insn_mcore;
281
      break;
282
#endif
283
#ifdef ARCH_mep
284
    case bfd_arch_mep:
285
      disassemble = print_insn_mep;
286
      break;
287
#endif
288
#ifdef ARCH_mips
289
    case bfd_arch_mips:
290
      if (bfd_big_endian (abfd))
291
        disassemble = print_insn_big_mips;
292
      else
293
        disassemble = print_insn_little_mips;
294
      break;
295
#endif
296
#ifdef ARCH_mmix
297
    case bfd_arch_mmix:
298
      disassemble = print_insn_mmix;
299
      break;
300
#endif
301
#ifdef ARCH_mn10200
302
    case bfd_arch_mn10200:
303
      disassemble = print_insn_mn10200;
304
      break;
305
#endif
306
#ifdef ARCH_mn10300
307
    case bfd_arch_mn10300:
308
      disassemble = print_insn_mn10300;
309
      break;
310
#endif
311
#ifdef ARCH_open8
312
    case bfd_arch_open8:
313
      disassemble = print_insn_open8;
314
      break;
315
#endif
316
#ifdef ARCH_openrisc
317
    case bfd_arch_openrisc:
318
      disassemble = print_insn_openrisc;
319
      break;
320
#endif
321
#ifdef ARCH_or32
322
    case bfd_arch_or32:
323
      if (bfd_big_endian (abfd))
324
        disassemble = print_insn_big_or32;
325
      else
326
        disassemble = print_insn_little_or32;
327
      break;
328
#endif
329
#ifdef ARCH_pdp11
330
    case bfd_arch_pdp11:
331
      disassemble = print_insn_pdp11;
332
      break;
333
#endif
334
#ifdef ARCH_pj
335
    case bfd_arch_pj:
336
      disassemble = print_insn_pj;
337
      break;
338
#endif
339
#ifdef ARCH_powerpc
340
    case bfd_arch_powerpc:
341
      if (bfd_big_endian (abfd))
342
        disassemble = print_insn_big_powerpc;
343
      else
344
        disassemble = print_insn_little_powerpc;
345
      break;
346
#endif
347
#ifdef ARCH_rs6000
348
    case bfd_arch_rs6000:
349
      if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
350
        disassemble = print_insn_big_powerpc;
351
      else
352
        disassemble = print_insn_rs6000;
353
      break;
354
#endif
355
#ifdef ARCH_rx
356
    case bfd_arch_rx:
357
      disassemble = print_insn_rx;
358
      break;
359
#endif
360
#ifdef ARCH_s390
361
    case bfd_arch_s390:
362
      disassemble = print_insn_s390;
363
      break;
364
#endif
365
#ifdef ARCH_score
366
    case bfd_arch_score:
367
      if (bfd_big_endian (abfd))
368
        disassemble = print_insn_big_score;
369
      else
370
        disassemble = print_insn_little_score;
371
     break;
372
#endif
373
#ifdef ARCH_sh
374
    case bfd_arch_sh:
375
      disassemble = print_insn_sh;
376
      break;
377
#endif
378
#ifdef ARCH_sparc
379
    case bfd_arch_sparc:
380
      disassemble = print_insn_sparc;
381
      break;
382
#endif
383
#ifdef ARCH_spu
384
    case bfd_arch_spu:
385
      disassemble = print_insn_spu;
386
      break;
387
#endif
388
#ifdef ARCH_tic30
389
    case bfd_arch_tic30:
390
      disassemble = print_insn_tic30;
391
      break;
392
#endif
393
#ifdef ARCH_tic4x
394
    case bfd_arch_tic4x:
395
      disassemble = print_insn_tic4x;
396
      break;
397
#endif
398
#ifdef ARCH_tic54x
399
    case bfd_arch_tic54x:
400
      disassemble = print_insn_tic54x;
401
      break;
402
#endif
403
#ifdef ARCH_tic6x
404
    case bfd_arch_tic6x:
405
      disassemble = print_insn_tic6x;
406
      break;
407
#endif
408
#ifdef ARCH_tic80
409
    case bfd_arch_tic80:
410
      disassemble = print_insn_tic80;
411
      break;
412
#endif
413
#ifdef ARCH_v850
414
    case bfd_arch_v850:
415
      disassemble = print_insn_v850;
416
      break;
417
#endif
418
#ifdef ARCH_w65
419
    case bfd_arch_w65:
420
      disassemble = print_insn_w65;
421
      break;
422
#endif
423
#ifdef ARCH_xstormy16
424
    case bfd_arch_xstormy16:
425
      disassemble = print_insn_xstormy16;
426
      break;
427
#endif
428
#ifdef ARCH_xc16x
429
    case bfd_arch_xc16x:
430
      disassemble = print_insn_xc16x;
431
      break;
432
#endif
433
#ifdef ARCH_xtensa
434
    case bfd_arch_xtensa:
435
      disassemble = print_insn_xtensa;
436
      break;
437
#endif
438
#ifdef ARCH_z80
439
    case bfd_arch_z80:
440
      disassemble = print_insn_z80;
441
      break;
442
#endif
443
#ifdef ARCH_z8k
444
    case bfd_arch_z8k:
445
      if (bfd_get_mach(abfd) == bfd_mach_z8001)
446
        disassemble = print_insn_z8001;
447
      else
448
        disassemble = print_insn_z8002;
449
      break;
450
#endif
451
#ifdef ARCH_vax
452
    case bfd_arch_vax:
453
      disassemble = print_insn_vax;
454
      break;
455
#endif
456
#ifdef ARCH_frv
457
    case bfd_arch_frv:
458
      disassemble = print_insn_frv;
459
      break;
460
#endif
461
#ifdef ARCH_moxie
462
    case bfd_arch_moxie:
463
      disassemble = print_insn_moxie;
464
      break;
465
#endif
466
#ifdef ARCH_iq2000
467
    case bfd_arch_iq2000:
468
      disassemble = print_insn_iq2000;
469
      break;
470
#endif
471
#ifdef ARCH_m32c
472
    case bfd_arch_m32c:
473
      disassemble = print_insn_m32c;
474
      break;
475
#endif
476
    default:
477
      return 0;
478
    }
479
  return disassemble;
480
}
481
 
482
void
483
disassembler_usage (stream)
484
     FILE * stream ATTRIBUTE_UNUSED;
485
{
486
#ifdef ARCH_arm
487
  print_arm_disassembler_options (stream);
488
#endif
489
#ifdef ARCH_mips
490
  print_mips_disassembler_options (stream);
491
#endif
492
#ifdef ARCH_powerpc
493
  print_ppc_disassembler_options (stream);
494
#endif
495
#ifdef ARCH_i386
496
  print_i386_disassembler_options (stream);
497
#endif
498
#ifdef ARCH_s390
499
  print_s390_disassembler_options (stream);
500
#endif
501
 
502
  return;
503
}
504
 
505
void
506
disassemble_init_for_target (struct disassemble_info * info)
507
{
508
  if (info == NULL)
509
    return;
510
 
511
  switch (info->arch)
512
    {
513
#ifdef ARCH_arm
514
    case bfd_arch_arm:
515
      info->symbol_is_valid = arm_symbol_is_valid;
516
      info->disassembler_needs_relocs = TRUE;
517
      break;
518
#endif
519
#ifdef ARCH_ia64
520
    case bfd_arch_ia64:
521
      info->skip_zeroes = 16;
522
      break;
523
#endif
524
#ifdef ARCH_tic4x
525
    case bfd_arch_tic4x:
526
      info->skip_zeroes = 32;
527
      break;
528
#endif
529
#ifdef ARCH_mep
530
    case bfd_arch_mep:
531
      info->skip_zeroes = 256;
532
      info->skip_zeroes_at_end = 0;
533
      break;
534
#endif
535
#ifdef ARCH_m32c
536
    case bfd_arch_m32c:
537
      /* This processor in fact is little endian.  The value set here
538
         reflects the way opcodes are written in the cgen description.  */
539
      info->endian = BFD_ENDIAN_BIG;
540
      if (! info->insn_sets)
541
        {
542
          info->insn_sets = cgen_bitset_create (ISA_MAX);
543
          if (info->mach == bfd_mach_m16c)
544
            cgen_bitset_set (info->insn_sets, ISA_M16C);
545
          else
546
            cgen_bitset_set (info->insn_sets, ISA_M32C);
547
        }
548
      break;
549
#endif
550
    default:
551
      break;
552
    }
553
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.