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olivier.gi |
`timescale 1 ns/100 ps
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// Version: 8.5 8.5.0.34
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module pmem(WD,RD,WEN,REN,WADDR,RADDR,RWCLK,RESET);
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input [7:0] WD;
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output [7:0] RD;
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input WEN, REN;
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input [11:0] WADDR, RADDR;
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input RWCLK, RESET;
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wire VCC, GND;
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VCC VCC_1_net(.Y(VCC));
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GND GND_1_net(.Y(GND));
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RAM4K9 pmem_R0C3(.ADDRA11(WADDR[11]), .ADDRA10(WADDR[10]),
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.ADDRA9(WADDR[9]), .ADDRA8(WADDR[8]), .ADDRA7(WADDR[7]),
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.ADDRA6(WADDR[6]), .ADDRA5(WADDR[5]), .ADDRA4(WADDR[4]),
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.ADDRA3(WADDR[3]), .ADDRA2(WADDR[2]), .ADDRA1(WADDR[1]),
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.ADDRA0(WADDR[0]), .ADDRB11(RADDR[11]), .ADDRB10(
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RADDR[10]), .ADDRB9(RADDR[9]), .ADDRB8(RADDR[8]), .ADDRB7(
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RADDR[7]), .ADDRB6(RADDR[6]), .ADDRB5(RADDR[5]), .ADDRB4(
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RADDR[4]), .ADDRB3(RADDR[3]), .ADDRB2(RADDR[2]), .ADDRB1(
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RADDR[1]), .ADDRB0(RADDR[0]), .DINA8(GND), .DINA7(GND),
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.DINA6(GND), .DINA5(GND), .DINA4(GND), .DINA3(GND),
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.DINA2(GND), .DINA1(GND), .DINA0(WD[3]), .DINB8(GND),
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.DINB7(GND), .DINB6(GND), .DINB5(GND), .DINB4(GND),
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.DINB3(GND), .DINB2(GND), .DINB1(GND), .DINB0(GND),
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.WIDTHA0(GND), .WIDTHA1(GND), .WIDTHB0(GND), .WIDTHB1(GND)
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, .PIPEA(GND), .PIPEB(GND), .WMODEA(GND), .WMODEB(GND),
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.BLKA(WEN), .BLKB(REN), .WENA(GND), .WENB(VCC), .CLKA(
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RWCLK), .CLKB(RWCLK), .RESET(RESET), .DOUTA8(), .DOUTA7(),
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.DOUTA6(), .DOUTA5(), .DOUTA4(), .DOUTA3(), .DOUTA2(),
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.DOUTA1(), .DOUTA0(), .DOUTB8(), .DOUTB7(), .DOUTB6(),
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.DOUTB5(), .DOUTB4(), .DOUTB3(), .DOUTB2(), .DOUTB1(),
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.DOUTB0(RD[3]));
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RAM4K9 pmem_R0C4(.ADDRA11(WADDR[11]), .ADDRA10(WADDR[10]),
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.ADDRA9(WADDR[9]), .ADDRA8(WADDR[8]), .ADDRA7(WADDR[7]),
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.ADDRA6(WADDR[6]), .ADDRA5(WADDR[5]), .ADDRA4(WADDR[4]),
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.ADDRA3(WADDR[3]), .ADDRA2(WADDR[2]), .ADDRA1(WADDR[1]),
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.ADDRA0(WADDR[0]), .ADDRB11(RADDR[11]), .ADDRB10(
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RADDR[10]), .ADDRB9(RADDR[9]), .ADDRB8(RADDR[8]), .ADDRB7(
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RADDR[7]), .ADDRB6(RADDR[6]), .ADDRB5(RADDR[5]), .ADDRB4(
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RADDR[4]), .ADDRB3(RADDR[3]), .ADDRB2(RADDR[2]), .ADDRB1(
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RADDR[1]), .ADDRB0(RADDR[0]), .DINA8(GND), .DINA7(GND),
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.DINA6(GND), .DINA5(GND), .DINA4(GND), .DINA3(GND),
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.DINA2(GND), .DINA1(GND), .DINA0(WD[4]), .DINB8(GND),
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.DINB7(GND), .DINB6(GND), .DINB5(GND), .DINB4(GND),
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.DINB3(GND), .DINB2(GND), .DINB1(GND), .DINB0(GND),
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.WIDTHA0(GND), .WIDTHA1(GND), .WIDTHB0(GND), .WIDTHB1(GND)
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, .PIPEA(GND), .PIPEB(GND), .WMODEA(GND), .WMODEB(GND),
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.BLKA(WEN), .BLKB(REN), .WENA(GND), .WENB(VCC), .CLKA(
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RWCLK), .CLKB(RWCLK), .RESET(RESET), .DOUTA8(), .DOUTA7(),
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.DOUTA6(), .DOUTA5(), .DOUTA4(), .DOUTA3(), .DOUTA2(),
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.DOUTA1(), .DOUTA0(), .DOUTB8(), .DOUTB7(), .DOUTB6(),
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.DOUTB5(), .DOUTB4(), .DOUTB3(), .DOUTB2(), .DOUTB1(),
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.DOUTB0(RD[4]));
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RAM4K9 pmem_R0C6(.ADDRA11(WADDR[11]), .ADDRA10(WADDR[10]),
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.ADDRA9(WADDR[9]), .ADDRA8(WADDR[8]), .ADDRA7(WADDR[7]),
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.ADDRA6(WADDR[6]), .ADDRA5(WADDR[5]), .ADDRA4(WADDR[4]),
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.ADDRA3(WADDR[3]), .ADDRA2(WADDR[2]), .ADDRA1(WADDR[1]),
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.ADDRA0(WADDR[0]), .ADDRB11(RADDR[11]), .ADDRB10(
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RADDR[10]), .ADDRB9(RADDR[9]), .ADDRB8(RADDR[8]), .ADDRB7(
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RADDR[7]), .ADDRB6(RADDR[6]), .ADDRB5(RADDR[5]), .ADDRB4(
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RADDR[4]), .ADDRB3(RADDR[3]), .ADDRB2(RADDR[2]), .ADDRB1(
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RADDR[1]), .ADDRB0(RADDR[0]), .DINA8(GND), .DINA7(GND),
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.DINA6(GND), .DINA5(GND), .DINA4(GND), .DINA3(GND),
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.DINA2(GND), .DINA1(GND), .DINA0(WD[6]), .DINB8(GND),
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.DINB7(GND), .DINB6(GND), .DINB5(GND), .DINB4(GND),
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.DINB3(GND), .DINB2(GND), .DINB1(GND), .DINB0(GND),
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.WIDTHA0(GND), .WIDTHA1(GND), .WIDTHB0(GND), .WIDTHB1(GND)
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, .PIPEA(GND), .PIPEB(GND), .WMODEA(GND), .WMODEB(GND),
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.BLKA(WEN), .BLKB(REN), .WENA(GND), .WENB(VCC), .CLKA(
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RWCLK), .CLKB(RWCLK), .RESET(RESET), .DOUTA8(), .DOUTA7(),
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.DOUTA6(), .DOUTA5(), .DOUTA4(), .DOUTA3(), .DOUTA2(),
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.DOUTA1(), .DOUTA0(), .DOUTB8(), .DOUTB7(), .DOUTB6(),
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.DOUTB5(), .DOUTB4(), .DOUTB3(), .DOUTB2(), .DOUTB1(),
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.DOUTB0(RD[6]));
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RAM4K9 pmem_R0C5(.ADDRA11(WADDR[11]), .ADDRA10(WADDR[10]),
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.ADDRA9(WADDR[9]), .ADDRA8(WADDR[8]), .ADDRA7(WADDR[7]),
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.ADDRA6(WADDR[6]), .ADDRA5(WADDR[5]), .ADDRA4(WADDR[4]),
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.ADDRA3(WADDR[3]), .ADDRA2(WADDR[2]), .ADDRA1(WADDR[1]),
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.ADDRA0(WADDR[0]), .ADDRB11(RADDR[11]), .ADDRB10(
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RADDR[10]), .ADDRB9(RADDR[9]), .ADDRB8(RADDR[8]), .ADDRB7(
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RADDR[7]), .ADDRB6(RADDR[6]), .ADDRB5(RADDR[5]), .ADDRB4(
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RADDR[4]), .ADDRB3(RADDR[3]), .ADDRB2(RADDR[2]), .ADDRB1(
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RADDR[1]), .ADDRB0(RADDR[0]), .DINA8(GND), .DINA7(GND),
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.DINA6(GND), .DINA5(GND), .DINA4(GND), .DINA3(GND),
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.DINA2(GND), .DINA1(GND), .DINA0(WD[5]), .DINB8(GND),
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.DINB7(GND), .DINB6(GND), .DINB5(GND), .DINB4(GND),
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.DINB3(GND), .DINB2(GND), .DINB1(GND), .DINB0(GND),
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.WIDTHA0(GND), .WIDTHA1(GND), .WIDTHB0(GND), .WIDTHB1(GND)
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, .PIPEA(GND), .PIPEB(GND), .WMODEA(GND), .WMODEB(GND),
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.BLKA(WEN), .BLKB(REN), .WENA(GND), .WENB(VCC), .CLKA(
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RWCLK), .CLKB(RWCLK), .RESET(RESET), .DOUTA8(), .DOUTA7(),
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.DOUTA6(), .DOUTA5(), .DOUTA4(), .DOUTA3(), .DOUTA2(),
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.DOUTA1(), .DOUTA0(), .DOUTB8(), .DOUTB7(), .DOUTB6(),
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.DOUTB5(), .DOUTB4(), .DOUTB3(), .DOUTB2(), .DOUTB1(),
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.DOUTB0(RD[5]));
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RAM4K9 pmem_R0C0(.ADDRA11(WADDR[11]), .ADDRA10(WADDR[10]),
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.ADDRA9(WADDR[9]), .ADDRA8(WADDR[8]), .ADDRA7(WADDR[7]),
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.ADDRA6(WADDR[6]), .ADDRA5(WADDR[5]), .ADDRA4(WADDR[4]),
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.ADDRA3(WADDR[3]), .ADDRA2(WADDR[2]), .ADDRA1(WADDR[1]),
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.ADDRA0(WADDR[0]), .ADDRB11(RADDR[11]), .ADDRB10(
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RADDR[10]), .ADDRB9(RADDR[9]), .ADDRB8(RADDR[8]), .ADDRB7(
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RADDR[7]), .ADDRB6(RADDR[6]), .ADDRB5(RADDR[5]), .ADDRB4(
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RADDR[4]), .ADDRB3(RADDR[3]), .ADDRB2(RADDR[2]), .ADDRB1(
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RADDR[1]), .ADDRB0(RADDR[0]), .DINA8(GND), .DINA7(GND),
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.DINA6(GND), .DINA5(GND), .DINA4(GND), .DINA3(GND),
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.DINA2(GND), .DINA1(GND), .DINA0(WD[0]), .DINB8(GND),
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.DINB7(GND), .DINB6(GND), .DINB5(GND), .DINB4(GND),
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.DINB3(GND), .DINB2(GND), .DINB1(GND), .DINB0(GND),
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.WIDTHA0(GND), .WIDTHA1(GND), .WIDTHB0(GND), .WIDTHB1(GND)
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, .PIPEA(GND), .PIPEB(GND), .WMODEA(GND), .WMODEB(GND),
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.BLKA(WEN), .BLKB(REN), .WENA(GND), .WENB(VCC), .CLKA(
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RWCLK), .CLKB(RWCLK), .RESET(RESET), .DOUTA8(), .DOUTA7(),
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.DOUTA6(), .DOUTA5(), .DOUTA4(), .DOUTA3(), .DOUTA2(),
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.DOUTA1(), .DOUTA0(), .DOUTB8(), .DOUTB7(), .DOUTB6(),
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.DOUTB5(), .DOUTB4(), .DOUTB3(), .DOUTB2(), .DOUTB1(),
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.DOUTB0(RD[0]));
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RAM4K9 pmem_R0C2(.ADDRA11(WADDR[11]), .ADDRA10(WADDR[10]),
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.ADDRA9(WADDR[9]), .ADDRA8(WADDR[8]), .ADDRA7(WADDR[7]),
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.ADDRA6(WADDR[6]), .ADDRA5(WADDR[5]), .ADDRA4(WADDR[4]),
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.ADDRA3(WADDR[3]), .ADDRA2(WADDR[2]), .ADDRA1(WADDR[1]),
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.ADDRA0(WADDR[0]), .ADDRB11(RADDR[11]), .ADDRB10(
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RADDR[10]), .ADDRB9(RADDR[9]), .ADDRB8(RADDR[8]), .ADDRB7(
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RADDR[7]), .ADDRB6(RADDR[6]), .ADDRB5(RADDR[5]), .ADDRB4(
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RADDR[4]), .ADDRB3(RADDR[3]), .ADDRB2(RADDR[2]), .ADDRB1(
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RADDR[1]), .ADDRB0(RADDR[0]), .DINA8(GND), .DINA7(GND),
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.DINA6(GND), .DINA5(GND), .DINA4(GND), .DINA3(GND),
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.DINA2(GND), .DINA1(GND), .DINA0(WD[2]), .DINB8(GND),
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.DINB7(GND), .DINB6(GND), .DINB5(GND), .DINB4(GND),
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.DINB3(GND), .DINB2(GND), .DINB1(GND), .DINB0(GND),
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.WIDTHA0(GND), .WIDTHA1(GND), .WIDTHB0(GND), .WIDTHB1(GND)
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, .PIPEA(GND), .PIPEB(GND), .WMODEA(GND), .WMODEB(GND),
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.BLKA(WEN), .BLKB(REN), .WENA(GND), .WENB(VCC), .CLKA(
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RWCLK), .CLKB(RWCLK), .RESET(RESET), .DOUTA8(), .DOUTA7(),
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.DOUTA6(), .DOUTA5(), .DOUTA4(), .DOUTA3(), .DOUTA2(),
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.DOUTA1(), .DOUTA0(), .DOUTB8(), .DOUTB7(), .DOUTB6(),
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.DOUTB5(), .DOUTB4(), .DOUTB3(), .DOUTB2(), .DOUTB1(),
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.DOUTB0(RD[2]));
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RAM4K9 pmem_R0C7(.ADDRA11(WADDR[11]), .ADDRA10(WADDR[10]),
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.ADDRA9(WADDR[9]), .ADDRA8(WADDR[8]), .ADDRA7(WADDR[7]),
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.ADDRA6(WADDR[6]), .ADDRA5(WADDR[5]), .ADDRA4(WADDR[4]),
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.ADDRA3(WADDR[3]), .ADDRA2(WADDR[2]), .ADDRA1(WADDR[1]),
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.ADDRA0(WADDR[0]), .ADDRB11(RADDR[11]), .ADDRB10(
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RADDR[10]), .ADDRB9(RADDR[9]), .ADDRB8(RADDR[8]), .ADDRB7(
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RADDR[7]), .ADDRB6(RADDR[6]), .ADDRB5(RADDR[5]), .ADDRB4(
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RADDR[4]), .ADDRB3(RADDR[3]), .ADDRB2(RADDR[2]), .ADDRB1(
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RADDR[1]), .ADDRB0(RADDR[0]), .DINA8(GND), .DINA7(GND),
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.DINA6(GND), .DINA5(GND), .DINA4(GND), .DINA3(GND),
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.DINA2(GND), .DINA1(GND), .DINA0(WD[7]), .DINB8(GND),
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.DINB7(GND), .DINB6(GND), .DINB5(GND), .DINB4(GND),
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.DINB3(GND), .DINB2(GND), .DINB1(GND), .DINB0(GND),
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.WIDTHA0(GND), .WIDTHA1(GND), .WIDTHB0(GND), .WIDTHB1(GND)
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, .PIPEA(GND), .PIPEB(GND), .WMODEA(GND), .WMODEB(GND),
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.BLKA(WEN), .BLKB(REN), .WENA(GND), .WENB(VCC), .CLKA(
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RWCLK), .CLKB(RWCLK), .RESET(RESET), .DOUTA8(), .DOUTA7(),
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.DOUTA6(), .DOUTA5(), .DOUTA4(), .DOUTA3(), .DOUTA2(),
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.DOUTA1(), .DOUTA0(), .DOUTB8(), .DOUTB7(), .DOUTB6(),
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.DOUTB5(), .DOUTB4(), .DOUTB3(), .DOUTB2(), .DOUTB1(),
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.DOUTB0(RD[7]));
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RAM4K9 pmem_R0C1(.ADDRA11(WADDR[11]), .ADDRA10(WADDR[10]),
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.ADDRA9(WADDR[9]), .ADDRA8(WADDR[8]), .ADDRA7(WADDR[7]),
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.ADDRA6(WADDR[6]), .ADDRA5(WADDR[5]), .ADDRA4(WADDR[4]),
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| 166 |
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.ADDRA3(WADDR[3]), .ADDRA2(WADDR[2]), .ADDRA1(WADDR[1]),
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| 167 |
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.ADDRA0(WADDR[0]), .ADDRB11(RADDR[11]), .ADDRB10(
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RADDR[10]), .ADDRB9(RADDR[9]), .ADDRB8(RADDR[8]), .ADDRB7(
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| 169 |
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RADDR[7]), .ADDRB6(RADDR[6]), .ADDRB5(RADDR[5]), .ADDRB4(
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| 170 |
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RADDR[4]), .ADDRB3(RADDR[3]), .ADDRB2(RADDR[2]), .ADDRB1(
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| 171 |
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RADDR[1]), .ADDRB0(RADDR[0]), .DINA8(GND), .DINA7(GND),
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.DINA6(GND), .DINA5(GND), .DINA4(GND), .DINA3(GND),
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.DINA2(GND), .DINA1(GND), .DINA0(WD[1]), .DINB8(GND),
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.DINB7(GND), .DINB6(GND), .DINB5(GND), .DINB4(GND),
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.DINB3(GND), .DINB2(GND), .DINB1(GND), .DINB0(GND),
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.WIDTHA0(GND), .WIDTHA1(GND), .WIDTHB0(GND), .WIDTHB1(GND)
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| 177 |
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, .PIPEA(GND), .PIPEB(GND), .WMODEA(GND), .WMODEB(GND),
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| 178 |
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.BLKA(WEN), .BLKB(REN), .WENA(GND), .WENB(VCC), .CLKA(
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| 179 |
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RWCLK), .CLKB(RWCLK), .RESET(RESET), .DOUTA8(), .DOUTA7(),
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.DOUTA6(), .DOUTA5(), .DOUTA4(), .DOUTA3(), .DOUTA2(),
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.DOUTA1(), .DOUTA0(), .DOUTB8(), .DOUTB7(), .DOUTB6(),
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.DOUTB5(), .DOUTB4(), .DOUTB3(), .DOUTB2(), .DOUTB1(),
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.DOUTB0(RD[1]));
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endmodule
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