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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [ram.ld] - Blame information for rev 265

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Line No. Rev Author Line
1 140 julius
 
2
/* Seen 3 bad pages, 180-182 (0xb400-0xb6ff), so put text after these pages */
3 246 julius
 
4 2 marcus.erl
MEMORY
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        {
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        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
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        ram     : ORIGIN = 0x00002000, LENGTH = 0x02000000 - 0x00002000
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        /* Uncomment the following to work around bad pages in a flash mem */
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        /*
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        ram     : ORIGIN = 0x00001200, LENGTH = 0xB400 - 0x1200
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        ram2     : ORIGIN = 0xb700, LENGTH = 0x02000000 - 0xb700
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        */
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        /*flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000*/
15 2 marcus.erl
        }
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19 2 marcus.erl
SECTIONS
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{
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        .vectors :
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        {
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        *(.crc)
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        *(.vectors)
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        } > vectors
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        .text :
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        {
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        _text_begin = .;
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        *(.text)
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        _text_end = .;
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        } > ram
33 2 marcus.erl
 
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        .data :
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/*      AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))*/
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        {
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        *(.data)
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        } > ram
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        .rodata :
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        {
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        *(.rodata)
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        *(.rodata.*)
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        } > ram
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        .bss :
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        {
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        *(.bss)
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        } > ram
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        .stack :
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        {
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        *(.stack)
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        src_addr = .;
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        } > ram
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/*
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        .monitor :
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        {
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        *(.monitor)
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        } > ram
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*/
62 2 marcus.erl
 
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/*
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        . += 0x100000;
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// This section was in cmds/load.c, but we don't need it -jb
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        .config :
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        {
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        _cfg_start = .;
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        *(.config)
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        _cfg_end = .;
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        } > ram
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*/
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/*
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        . = 0xf0000100;
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        .monitor ALIGN(0x40000) :
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        {
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        *(.monitor)
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        } > flash
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        . += 0x100000;
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        .config ALIGN(0x40000) :
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        {
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        _cfg_start = .;
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        *(.config)
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        _cfg_end = .;
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        } > flash
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*/
91 2 marcus.erl
}

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