1 |
148 |
jeremybenn |
/*
|
2 |
|
|
(C) Copyright 2001,2006,
|
3 |
|
|
International Business Machines Corporation,
|
4 |
|
|
Sony Computer Entertainment, Incorporated,
|
5 |
|
|
Toshiba Corporation,
|
6 |
|
|
|
7 |
|
|
All rights reserved.
|
8 |
|
|
|
9 |
|
|
Redistribution and use in source and binary forms, with or without
|
10 |
|
|
modification, are permitted provided that the following conditions are met:
|
11 |
|
|
|
12 |
|
|
* Redistributions of source code must retain the above copyright notice,
|
13 |
|
|
this list of conditions and the following disclaimer.
|
14 |
|
|
* Redistributions in binary form must reproduce the above copyright
|
15 |
|
|
notice, this list of conditions and the following disclaimer in the
|
16 |
|
|
documentation and/or other materials provided with the distribution.
|
17 |
|
|
* Neither the names of the copyright holders nor the names of their
|
18 |
|
|
contributors may be used to endorse or promote products derived from this
|
19 |
|
|
software without specific prior written permission.
|
20 |
|
|
|
21 |
|
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
22 |
|
|
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
23 |
|
|
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
24 |
|
|
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
|
25 |
|
|
OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
26 |
|
|
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
27 |
|
|
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
28 |
|
|
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
29 |
|
|
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
30 |
|
|
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
31 |
|
|
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
32 |
|
|
*/
|
33 |
|
|
#ifndef _FESETROUND_H_
|
34 |
|
|
#define _FESETROUND_H_ 1
|
35 |
|
|
|
36 |
|
|
#include <spu_intrinsics.h>
|
37 |
|
|
#include <fenv.h>
|
38 |
|
|
|
39 |
|
|
#define FE_MASK_ROUND (__FE_ROUND_ELE_0 | __FE_ROUND_ELE_1)
|
40 |
|
|
|
41 |
|
|
#define SMALL (FE_MASK_ROUND - 1)
|
42 |
|
|
#define LARGE (FE_MASK_ROUND + \
|
43 |
|
|
((__FE_SPU_DOWNWARD << 2) | __FE_SPU_DOWNWARD) + 1)
|
44 |
|
|
|
45 |
|
|
static __inline int _fesetround(int mode)
|
46 |
|
|
{
|
47 |
|
|
unsigned int umode;
|
48 |
|
|
vec_uint4 vec_mode;
|
49 |
|
|
vec_uint4 valid, fail;
|
50 |
|
|
vec_uint4 cur_fpscr, new_fpscr, mask_fpscr;
|
51 |
|
|
vec_uint4 const valid_ele0 =
|
52 |
|
|
{ FE_TONEAREST, FE_TOWARDZERO, FE_UPWARD, FE_DOWNWARD };
|
53 |
|
|
vec_uint4 const valid_ele1 =
|
54 |
|
|
{ FE_TONEAREST_1, FE_TOWARDZERO_1, FE_UPWARD_1, FE_DOWNWARD_1 };
|
55 |
|
|
vec_uint4 const too_large = { LARGE, LARGE, LARGE, LARGE };
|
56 |
|
|
vec_uchar16 const splat_ele0 =
|
57 |
|
|
{ 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3 };
|
58 |
|
|
vec_uint4 const clear_non_ele0 = { 0xffffffff, 0, 0, 0 };
|
59 |
|
|
|
60 |
|
|
/*
|
61 |
|
|
* There are 24 valid values, check for a range plus the other 8
|
62 |
|
|
* rather than check for specific bit settings.
|
63 |
|
|
*
|
64 |
|
|
* These are all the valid values:
|
65 |
|
|
* 0xf00 through 0xf0f (SMALL + 1 through LARGE - 1, 16 values)
|
66 |
|
|
* 0xc00 0xc04 0xc08 0xc0c (in ele0)
|
67 |
|
|
* 0x300 0x301 0x302 0x303 (in ele1)
|
68 |
|
|
*/
|
69 |
|
|
umode = mode;
|
70 |
|
|
vec_mode = spu_splats(umode);
|
71 |
|
|
valid = spu_cmpeq(vec_mode, valid_ele0);
|
72 |
|
|
valid = spu_or(valid, spu_cmpeq(vec_mode, valid_ele1));
|
73 |
|
|
valid = spu_or(valid, spu_cmpgt(vec_mode, SMALL));
|
74 |
|
|
valid = spu_and(valid, spu_cmpgt(too_large, vec_mode));
|
75 |
|
|
|
76 |
|
|
fail = spu_gather(valid);
|
77 |
|
|
fail = spu_cmpeq(fail, 0);
|
78 |
|
|
/*
|
79 |
|
|
* set all elements of fail to the value of fail's element 0, so
|
80 |
|
|
* we can select the current fpscr values on failure.
|
81 |
|
|
*/
|
82 |
|
|
fail = spu_shuffle(fail, fail, splat_ele0);
|
83 |
|
|
|
84 |
|
|
cur_fpscr = spu_mffpscr();
|
85 |
|
|
/*
|
86 |
|
|
* We don't have to mask the round element selection out since it
|
87 |
|
|
* is shifted out.
|
88 |
|
|
*/
|
89 |
|
|
new_fpscr = spu_promote(umode << 8, 0);
|
90 |
|
|
new_fpscr = spu_and(new_fpscr, clear_non_ele0);
|
91 |
|
|
/*
|
92 |
|
|
* Use the element bits of the mode to set the mask.
|
93 |
|
|
*/
|
94 |
|
|
mask_fpscr = spu_promote((umode & FE_MASK_ROUND), 0);
|
95 |
|
|
new_fpscr = spu_sel(cur_fpscr, new_fpscr, mask_fpscr);
|
96 |
|
|
/*
|
97 |
|
|
* Use the current fpscr value if the round mode was invalid
|
98 |
|
|
*/
|
99 |
|
|
new_fpscr = spu_sel(new_fpscr, cur_fpscr, fail);
|
100 |
|
|
spu_mtfpscr(new_fpscr);
|
101 |
|
|
|
102 |
|
|
return spu_extract(fail, 0);
|
103 |
|
|
}
|
104 |
|
|
#endif /* _FESETROUND_H_ */
|